iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros (4e7120d7) · Commits · 戴 / test

For both PASID-based-Device-TLB Invalidate Descriptor and Device-TLB Invalidate Descriptor, the Physical Function Source-ID value is split according to this layout: PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52. Fix the part laid out at offset 52. Fixes: ("iommu/vt-d: Add definitions for PFSID") Signed-off-by:

Eric Auger <eric.auger@redhat.com> Acked-by:

Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: stable@vger.kernel.org # v4.19+ Acked-by:

Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by:

Joerg Roedel <jroedel@suse.de>

include/linux/intel-iommu.h

+4 −2

Original line number	Diff line number	Diff line
		@@ -336,7 +336,8 @@ enum {
		#define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32)
		#define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16)
		#define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
		#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| ((u64)(pfsid & 0xfff) << 52))
		#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| \
		((u64)((pfsid >> 4) & 0xfff) << 52))
		#define QI_DEV_IOTLB_SIZE 1
		#define QI_DEV_IOTLB_MAX_INVS 32

		@@ -360,7 +361,8 @@ enum {
		#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
		#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
		#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
		#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| ((u64)(pfsid & 0xfff) << 52))
		#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| \
		((u64)((pfsid >> 4) & 0xfff) << 52))
		#define QI_DEV_EIOTLB_MAX_INVS 32

		/* Page group response descriptor QW0 */

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