ASoC: q6afe: dt-bindings: add q6afe clock bindings

		0 - MSB

		1 - LSB

= AFE CLOCKSS

"clocks" subnode of the AFE node. It represents q6afe clocks

"clocks" node should have following properties.

- compatible:

	Usage: required

	Value type: <stringlist>

	Definition: must be "qcom,q6afe-clocks"

- #clock-cells:

	Usage: required

	Value type: <u32>

	Definition: Must be 2. Clock Id followed by

		below valid clock coupling attributes.

		1 - for no coupled clock

		2 - for dividend of the coupled clock

		3 - for divisor of the coupled clock

		4 - for inverted and no couple clock

= EXAMPLE

apr-service@4 {

			qcom,sd-lines = <1>;

		};

	};

	clocks {

		compatible = "qcom,q6afe-clocks";

		#clock-cells = <2>;

	};

};

#define RX_CODEC_DMA_RX_6	125

#define RX_CODEC_DMA_RX_7	126

#endif /* __DT_BINDINGS_Q6_AFE_H__ */

#define LPASS_CLK_ID_PRI_MI2S_IBIT	1

#define LPASS_CLK_ID_PRI_MI2S_EBIT	2

#define LPASS_CLK_ID_SEC_MI2S_IBIT	3

#define LPASS_CLK_ID_SEC_MI2S_EBIT	4

#define LPASS_CLK_ID_TER_MI2S_IBIT	5

#define LPASS_CLK_ID_TER_MI2S_EBIT	6

#define LPASS_CLK_ID_QUAD_MI2S_IBIT	7

#define LPASS_CLK_ID_QUAD_MI2S_EBIT	8

#define LPASS_CLK_ID_SPEAKER_I2S_IBIT	9

#define LPASS_CLK_ID_SPEAKER_I2S_EBIT	10

#define LPASS_CLK_ID_SPEAKER_I2S_OSR	11

#define LPASS_CLK_ID_QUI_MI2S_IBIT	12

#define LPASS_CLK_ID_QUI_MI2S_EBIT	13

#define LPASS_CLK_ID_SEN_MI2S_IBIT	14

#define LPASS_CLK_ID_SEN_MI2S_EBIT	15

#define LPASS_CLK_ID_INT0_MI2S_IBIT	16

#define LPASS_CLK_ID_INT1_MI2S_IBIT	17

#define LPASS_CLK_ID_INT2_MI2S_IBIT	18

#define LPASS_CLK_ID_INT3_MI2S_IBIT	19

#define LPASS_CLK_ID_INT4_MI2S_IBIT	20

#define LPASS_CLK_ID_INT5_MI2S_IBIT	21

#define LPASS_CLK_ID_INT6_MI2S_IBIT	22

#define LPASS_CLK_ID_QUI_MI2S_OSR	23

#define LPASS_CLK_ID_PRI_PCM_IBIT	24

#define LPASS_CLK_ID_PRI_PCM_EBIT	25

#define LPASS_CLK_ID_SEC_PCM_IBIT	26

#define LPASS_CLK_ID_SEC_PCM_EBIT	27

#define LPASS_CLK_ID_TER_PCM_IBIT	28

#define LPASS_CLK_ID_TER_PCM_EBIT	29

#define LPASS_CLK_ID_QUAD_PCM_IBIT	30

#define LPASS_CLK_ID_QUAD_PCM_EBIT	31

#define LPASS_CLK_ID_QUIN_PCM_IBIT	32

#define LPASS_CLK_ID_QUIN_PCM_EBIT	33

#define LPASS_CLK_ID_QUI_PCM_OSR	34

#define LPASS_CLK_ID_PRI_TDM_IBIT	35

#define LPASS_CLK_ID_PRI_TDM_EBIT	36

#define LPASS_CLK_ID_SEC_TDM_IBIT	37

#define LPASS_CLK_ID_SEC_TDM_EBIT	38

#define LPASS_CLK_ID_TER_TDM_IBIT	39

#define LPASS_CLK_ID_TER_TDM_EBIT	40

#define LPASS_CLK_ID_QUAD_TDM_IBIT	41

#define LPASS_CLK_ID_QUAD_TDM_EBIT	42

#define LPASS_CLK_ID_QUIN_TDM_IBIT	43

#define LPASS_CLK_ID_QUIN_TDM_EBIT	44

#define LPASS_CLK_ID_QUIN_TDM_OSR	45

#define LPASS_CLK_ID_MCLK_1		46

#define LPASS_CLK_ID_MCLK_2		47

#define LPASS_CLK_ID_MCLK_3		48

#define LPASS_CLK_ID_MCLK_4		49

#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE	50

#define LPASS_CLK_ID_INT_MCLK_0		51

#define LPASS_CLK_ID_INT_MCLK_1		52

#define LPASS_CLK_ID_MCLK_5		53

#define LPASS_CLK_ID_WSA_CORE_MCLK	54

#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK	55

#define LPASS_CLK_ID_VA_CORE_MCLK	56

#define LPASS_CLK_ID_TX_CORE_MCLK	57

#define LPASS_CLK_ID_TX_CORE_NPL_MCLK	58

#define LPASS_CLK_ID_RX_CORE_MCLK	59

#define LPASS_CLK_ID_RX_CORE_NPL_MCLK	60

#define LPASS_CLK_ID_VA_CORE_2X_MCLK	61

#define LPASS_HW_AVTIMER_VOTE		101

#define LPASS_HW_MACRO_VOTE		102

#define LPASS_HW_DCODEC_VOTE		103

#define Q6AFE_MAX_CLK_ID			104

#define LPASS_CLK_ATTRIBUTE_INVALID		0x0

#define LPASS_CLK_ATTRIBUTE_COUPLE_NO		0x1

#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND	0x2

#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR	0x3

#endif /* __DT_BINDINGS_Q6_AFE_H__ */