Commit 4de737a2 authored Jul 24, 2018 by Nathan Ciobanu Committed by Rodrigo Vivi Jul 25, 2018

drm/i915/dp: Improve clock recovery loop limit comment



Clarifies the clock recovery loop limit comment that 80
max_cr_tries for pre-DP1.4 devices was chosen as a very
tolerant upper bound.
Assumptions made:
- DP1.4 syncs should be smarter so they won't need more
than 10 tries
- pre-DP1.4 syncs should be compliant enough to not need
that many tries (80) but we should tolerate any that may
trigger this corner case

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Marc Herbert <marc.herbert@intel.com>
Suggested-by: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Nathan Ciobanu <nathan.d.ciobanu@linux.intel.com>
Reviewed-by: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532471612-30001-1-git-send-email-nathan.d.ciobanu@linux.intel.com

parent 3970c65c

drivers/gpu/drm/i915/intel_dp_link_training.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -172,10 +172,12 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp)
		}

		/*
		* DP 1.4 spec clock recovery retries defined but
		* for devices pre-DP 1.4 we set the retry limit
		* to 4 (voltage levels) x 4 (preemphasis levels) x
		* x 5 (same voltage retries) = 80 (max iterations)
		* The DP 1.4 spec defines the max clock recovery retries value
		* as 10 but for pre-DP 1.4 devices we set a very tolerant
		* retry limit of 80 (4 voltage levels x 4 preemphasis levels x
		* x 5 identical voltage retries). Since the previous specs didn't
		* define a limit and created the possibility of an infinite loop
		* we want to prevent any sync from triggering that corner case.
		*/
		if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
		max_cr_tries = 10;

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