Commit 4dd2da15 authored by Archit Taneja's avatar Archit Taneja Committed by Tomi Valkeinen
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OMAP: DSS2: DISPC: Shorten dispc_dump_regs() 



Iterate over manager and overlay id's to shorten dispc_dump_regs().

Signed-off-by: default avatarArchit Taneja <archit@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 5010be80

drivers/video/omap2/dss/dispc.c

+99 −229
Original line number Diff line number Diff line
@@ -2707,6 +2707,19 @@ void dispc_dump_irqs(struct seq_file *s) 


void dispc_dump_regs(struct seq_file *s)

{

	int i, j;

	const char *mgr_names[] = {

		[OMAP_DSS_CHANNEL_LCD]		= "LCD",

		[OMAP_DSS_CHANNEL_DIGIT]	= "TV",

		[OMAP_DSS_CHANNEL_LCD2]		= "LCD2",

	};

	const char *ovl_names[] = {

		[OMAP_DSS_GFX]		= "GFX",

		[OMAP_DSS_VIDEO1]	= "VID1",

		[OMAP_DSS_VIDEO2]	= "VID2",

	};

	const char **p_names;



#define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r))



	if (dispc_runtime_get())
@@ -2733,258 +2746,115 @@ void dispc_dump_regs(struct seq_file *s) 
#undef DUMPREG



#define DISPC_REG(i, name) name(i)

#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, #i, \

	48 - strlen(#r) - strlen(#i), " ", \

#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, p_names[i], \

	48 - strlen(#r) - strlen(p_names[i]), " ", \

	dispc_read_reg(DISPC_REG(i, r)))



	/* LCD registers */

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DEFAULT_COLOR);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TRANS_COLOR);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_H);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_V);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_POL_FREQ);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DIVISORo);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_SIZE_MGR);

	p_names = mgr_names;



	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE1);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE2);

	DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE3);

	/* DISPC channel specific registers */

	for (i = 0; i < dss_feat_get_num_mgrs(); i++) {

		DUMPREG(i, DISPC_DEFAULT_COLOR);

		DUMPREG(i, DISPC_TRANS_COLOR);

		DUMPREG(i, DISPC_SIZE_MGR);



	if (dss_has_feature(FEAT_CPR)) {

		DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_R);

		DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_G);

		DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_B);

	}

		if (i == OMAP_DSS_CHANNEL_DIGIT)

			continue;



	/* DIGIT registers */

	DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_DEFAULT_COLOR);

	DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_TRANS_COLOR);

	DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_SIZE_MGR);

		DUMPREG(i, DISPC_DEFAULT_COLOR);

		DUMPREG(i, DISPC_TRANS_COLOR);

		DUMPREG(i, DISPC_TIMING_H);

		DUMPREG(i, DISPC_TIMING_V);

		DUMPREG(i, DISPC_POL_FREQ);

		DUMPREG(i, DISPC_DIVISORo);

		DUMPREG(i, DISPC_SIZE_MGR);



	/* LCD2 registers */

	if (dss_has_feature(FEAT_MGR_LCD2)) {

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DEFAULT_COLOR);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TRANS_COLOR);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_H);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_V);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_POL_FREQ);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DIVISORo);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_SIZE_MGR);



		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE1);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE2);

		DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE3);

		DUMPREG(i, DISPC_DATA_CYCLE1);

		DUMPREG(i, DISPC_DATA_CYCLE2);

		DUMPREG(i, DISPC_DATA_CYCLE3);



		if (dss_has_feature(FEAT_CPR)) {

			DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_R);

			DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_G);

			DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_B);

		}

	}



	/* GFX registers */

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA0);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA1);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_POSITION);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_SIZE);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ATTRIBUTES);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_THRESHOLD);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_SIZE_STATUS);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ROW_INC);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PIXEL_INC);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_WINDOW_SKIP);

	DUMPREG(OMAP_DSS_GFX, DISPC_OVL_TABLE_BA);

	if (dss_has_feature(FEAT_PRELOAD))

		DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PRELOAD);



	/* VIDEO1 registers */

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_POSITION);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_SIZE);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_THRESHOLD);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_SIZE_STATUS);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ROW_INC);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PIXEL_INC);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PICTURE_SIZE);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU0);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU1);

	if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0_UV);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1_UV);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR2);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_0);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_1);

			DUMPREG(i, DISPC_CPR_COEF_R);

			DUMPREG(i, DISPC_CPR_COEF_G);

			DUMPREG(i, DISPC_CPR_COEF_B);

		}

	if (dss_has_feature(FEAT_ATTR2))

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES2);

	}



	p_names = ovl_names;



	for (i = 0; i < dss_feat_get_num_ovls(); i++) {

		DUMPREG(i, DISPC_OVL_BA0);

		DUMPREG(i, DISPC_OVL_BA1);

		DUMPREG(i, DISPC_OVL_POSITION);

		DUMPREG(i, DISPC_OVL_SIZE);

		DUMPREG(i, DISPC_OVL_ATTRIBUTES);

		DUMPREG(i, DISPC_OVL_FIFO_THRESHOLD);

		DUMPREG(i, DISPC_OVL_FIFO_SIZE_STATUS);

		DUMPREG(i, DISPC_OVL_ROW_INC);

		DUMPREG(i, DISPC_OVL_PIXEL_INC);

		if (dss_has_feature(FEAT_PRELOAD))

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PRELOAD);



	/* VIDEO2 registers */

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_POSITION);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_SIZE);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_THRESHOLD);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_SIZE_STATUS);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ROW_INC);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PIXEL_INC);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PICTURE_SIZE);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU0);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU1);

			DUMPREG(i, DISPC_OVL_PRELOAD);



		if (i == OMAP_DSS_GFX) {

			DUMPREG(i, DISPC_OVL_WINDOW_SKIP);

			DUMPREG(i, DISPC_OVL_TABLE_BA);

			continue;

		}



		DUMPREG(i, DISPC_OVL_FIR);

		DUMPREG(i, DISPC_OVL_PICTURE_SIZE);

		DUMPREG(i, DISPC_OVL_ACCU0);

		DUMPREG(i, DISPC_OVL_ACCU1);

		if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0_UV);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1_UV);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR2);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_0);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_1);

			DUMPREG(i, DISPC_OVL_BA0_UV);

			DUMPREG(i, DISPC_OVL_BA1_UV);

			DUMPREG(i, DISPC_OVL_FIR2);

			DUMPREG(i, DISPC_OVL_ACCU2_0);

			DUMPREG(i, DISPC_OVL_ACCU2_1);

		}

		if (dss_has_feature(FEAT_ATTR2))

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES2);

			DUMPREG(i, DISPC_OVL_ATTRIBUTES2);

		if (dss_has_feature(FEAT_PRELOAD))

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PRELOAD);

			DUMPREG(i, DISPC_OVL_PRELOAD);

	}



#undef DISPC_REG

#undef DUMPREG



#define DISPC_REG(plane, name, i) name(plane, i)

#define DUMPREG(plane, name, i) \

	seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, #plane, \

	46 - strlen(#name) - strlen(#plane), " ", \

	seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \

	46 - strlen(#name) - strlen(p_names[plane]), " ", \

	dispc_read_reg(DISPC_REG(plane, name, i)))



	/* VIDEO1 coefficient registers */

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 0);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 1);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 2);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 3);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 4);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 5);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 6);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 7);



	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 0);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 1);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 2);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 3);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 4);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 5);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 6);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 7);



	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 0);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 1);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 2);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 3);

	DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 4);

	/* Video pipeline coefficient registers */



	if (dss_has_feature(FEAT_FIR_COEF_V)) {

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 0);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 1);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 2);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 3);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 4);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 5);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 6);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 7);

	}

	/* start from OMAP_DSS_VIDEO1 */

	for (i = 1; i < dss_feat_get_num_ovls(); i++) {

		for (j = 0; j < 8; j++)

			DUMPREG(i, DISPC_OVL_FIR_COEF_H, j);



		for (j = 0; j < 8; j++)

			DUMPREG(i, DISPC_OVL_FIR_COEF_HV, j);



		for (j = 0; j < 5; j++)

			DUMPREG(i, DISPC_OVL_CONV_COEF, j);



	if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 0);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 1);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 2);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 3);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 4);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 5);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 6);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 7);



		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 0);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 1);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 2);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 3);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 4);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 5);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 6);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 7);



		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 0);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 1);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 2);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 3);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 4);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 5);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 6);

		DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 7);

	}



	/* VIDEO2 coefficient registers */

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 0);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 1);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 2);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 3);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 4);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 5);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 6);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 7);



	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 0);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 1);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 2);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 3);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 4);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 5);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 6);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 7);



	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 0);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 1);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 2);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 3);

	DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 4);

		if (dss_has_feature(FEAT_FIR_COEF_V)) {

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 0);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 1);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 2);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 3);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 4);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 5);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 6);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 7);

			for (j = 0; j < 8; j++)

				DUMPREG(i, DISPC_OVL_FIR_COEF_V, j);

		}



		if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 0);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 1);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 2);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 3);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 4);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 5);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 6);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 7);



		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 0);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 1);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 2);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 3);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 4);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 5);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 6);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 7);



		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 0);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 1);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 2);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 3);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 4);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 5);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 6);

		DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 7);

			for (j = 0; j < 8; j++)

				DUMPREG(i, DISPC_OVL_FIR_COEF_H2, j);



			for (j = 0; j < 8; j++)

				DUMPREG(i, DISPC_OVL_FIR_COEF_HV2, j);



			for (j = 0; j < 8; j++)

				DUMPREG(i, DISPC_OVL_FIR_COEF_V2, j);

		}

	}



	dispc_runtime_put();

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