Commit 4dcc3df8 authored by Kim Phillips's avatar Kim Phillips Committed by Borislav Petkov
Browse files

perf/amd/uncore: Prepare L3 thread mask code for Family 19h 



In order to better accommodate the upcoming Family 19h, given
the 80-char line limit, move the existing code into a new
l3_thread_slice_mask() function.

No functional changes.

 [ bp: Touchups. ]

Signed-off-by: default avatarKim Phillips <kim.phillips@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarPeter Zijlstra <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200313231024.17601-1-kim.phillips@amd.com
parent 95ed6c70

arch/x86/events/amd/uncore.c

+16 −9
Original line number Diff line number Diff line
@@ -180,6 +180,20 @@ static void amd_uncore_del(struct perf_event *event, int flags) 
	hwc->idx = -1;

}



/*

 * Convert logical CPU number to L3 PMC Config ThreadMask format

 */

static u64 l3_thread_slice_mask(int cpu)

{

	int thread = 2 * (cpu_data(cpu).cpu_core_id % 4);



	if (smp_num_siblings > 1)

		thread += cpu_data(cpu).apicid & 1;



	return (1ULL << (AMD64_L3_THREAD_SHIFT + thread) &

		AMD64_L3_THREAD_MASK) | AMD64_L3_SLICE_MASK;

}



static int amd_uncore_event_init(struct perf_event *event)

{

	struct amd_uncore *uncore;
@@ -209,15 +223,8 @@ static int amd_uncore_event_init(struct perf_event *event) 
	 * SliceMask and ThreadMask need to be set for certain L3 events in

	 * Family 17h. For other events, the two fields do not affect the count.

	 */

	if (l3_mask && is_llc_event(event)) {

		int thread = 2 * (cpu_data(event->cpu).cpu_core_id % 4);



		if (smp_num_siblings > 1)

			thread += cpu_data(event->cpu).apicid & 1;



		hwc->config |= (1ULL << (AMD64_L3_THREAD_SHIFT + thread) &

				AMD64_L3_THREAD_MASK) | AMD64_L3_SLICE_MASK;

	}

	if (l3_mask && is_llc_event(event))

		hwc->config |= l3_thread_slice_mask(event->cpu);



	uncore = event_to_amd_uncore(event);

	if (!uncore)

CRA Git | Maintained and supported by SUSTech CRA and CCSE