ARM: dts: am335x-pcm-953: Remove eth phy delay (4dc020c5) · Commits · 戴 / test

Default values fit better than these historical settings. Hardware layout had been adapted accordingly already in alpha stage. They did not cause problems for a long time. Removed values now. Signed-off-by:

Teresa Remmet <t.remmet@phytec.de> Signed-off-by:

Tony Lindgren <tony@atomide.com>

arch/arm/boot/dts/am335x-pcm-953.dtsi

+0 −16

Original line number	Diff line number	Diff line
		@@ -136,22 +136,6 @@
		&davinci_mdio {
		phy1: ethernet-phy@2 {
		reg = <2>;

		/* Register 260 (104h) – RGMII Clock and Control Pad Skew */
		rxc-skew-ps = <1400>;
		rxdv-skew-ps = <0>;
		txc-skew-ps = <1400>;
		txen-skew-ps = <0>;
		/* Register 261 (105h) – RGMII RX Data Pad Skew */
		rxd3-skew-ps = <0>;
		rxd2-skew-ps = <0>;
		rxd1-skew-ps = <0>;
		rxd0-skew-ps = <0>;
		/* Register 262 (106h) – RGMII TX Data Pad Skew */
		txd3-skew-ps = <0>;
		txd2-skew-ps = <0>;
		txd1-skew-ps = <0>;
		txd0-skew-ps = <0>;
		};
		};

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