Commit 4d5308e7 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-fixes-5.3-2019-07-24' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 



drm-fixes-5.3-2019-07-24:

amdgpu:
- RAS fixes for vega20
- Navi VCN fix
- DC audio fixes
- DC DSC fixes
- DC dongle fixes
- DC clk mgr fixes
- Fix DDC lines on some RV2 boards
- GDS fixes for compute
- Navi SMU fixes

ttm:
- Use the same attributes when freeing d_page->vaddr

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190724210527.3415-1-alexander.deucher@amd.com
parents f480de3f 92e6475a

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -148,7 +148,7 @@ struct amdgpu_mgpu_info mgpu_info = { 
	.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),

};

int amdgpu_ras_enable = -1;

uint amdgpu_ras_mask = 0xffffffff;

uint amdgpu_ras_mask = 0xfffffffb;



/**

 * DOC: vramlimit (int)

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -1734,7 +1734,7 @@ static ssize_t amdgpu_hwmon_get_fan1_input(struct device *dev, 
		return -EINVAL;



	if (is_support_sw_smu(adev)) {

		err = smu_get_current_rpm(&adev->smu, &speed);

		err = smu_get_fan_speed_rpm(&adev->smu, &speed);

		if (err)

			return err;

	} else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) {
@@ -1794,7 +1794,7 @@ static ssize_t amdgpu_hwmon_get_fan1_target(struct device *dev, 
		return -EINVAL;



	if (is_support_sw_smu(adev)) {

		err = smu_get_current_rpm(&adev->smu, &rpm);

		err = smu_get_fan_speed_rpm(&adev->smu, &rpm);

		if (err)

			return err;

	} else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+12 −7
Original line number Diff line number Diff line
@@ -136,11 +136,6 @@ static int amdgpu_ras_reserve_vram(struct amdgpu_device *adev, 
static int amdgpu_ras_release_vram(struct amdgpu_device *adev,

		struct amdgpu_bo **bo_ptr);



static void amdgpu_ras_self_test(struct amdgpu_device *adev)

{

	/* TODO */

}



static ssize_t amdgpu_ras_debugfs_read(struct file *f, char __user *buf,

					size_t size, loff_t *pos)

{
@@ -689,6 +684,12 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev, 
	if (!obj)

		return -EINVAL;



	if (block_info.block_id != TA_RAS_BLOCK__UMC) {

		DRM_INFO("%s error injection is not supported yet\n",

			 ras_block_str(info->head.block));

		return -EINVAL;

	}



	ret = psp_ras_trigger_error(&adev->psp, &block_info);

	if (ret)

		DRM_ERROR("RAS ERROR: inject %s error failed ret %d\n",
@@ -1557,6 +1558,12 @@ int amdgpu_ras_init(struct amdgpu_device *adev) 


	amdgpu_ras_check_supported(adev, &con->hw_supported,

			&con->supported);

	if (!con->hw_supported) {

		amdgpu_ras_set_context(adev, NULL);

		kfree(con);

		return 0;

	}



	con->features = 0;

	INIT_LIST_HEAD(&con->head);

	/* Might need get this flag from vbios. */
@@ -1570,8 +1577,6 @@ int amdgpu_ras_init(struct amdgpu_device *adev) 
	if (amdgpu_ras_fs_init(adev))

		goto fs_out;



	amdgpu_ras_self_test(adev);



	DRM_INFO("RAS INFO: ras initialized successfully, "

			"hardware ability[%x] ras_mask[%x]\n",

			con->hw_supported, con->supported);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+9 −0
Original line number Diff line number Diff line
@@ -1441,6 +1441,15 @@ static void gfx_v10_0_init_compute_vmid(struct amdgpu_device *adev) 
	}

	nv_grbm_select(adev, 0, 0, 0, 0);

	mutex_unlock(&adev->srbm_mutex);



	/* Initialize all compute VMIDs to have no GDS, GWS, or OA

	   acccess. These should be enabled by FW for target VMIDs. */

	for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) {

		WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0);

		WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0);

		WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0);

		WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0);

	}

}



static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+9 −0
Original line number Diff line number Diff line
@@ -1879,6 +1879,15 @@ static void gfx_v7_0_init_compute_vmid(struct amdgpu_device *adev) 
	}

	cik_srbm_select(adev, 0, 0, 0, 0);

	mutex_unlock(&adev->srbm_mutex);



	/* Initialize all compute VMIDs to have no GDS, GWS, or OA

	   acccess. These should be enabled by FW for target VMIDs. */

	for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) {

		WREG32(amdgpu_gds_reg_offset[i].mem_base, 0);

		WREG32(amdgpu_gds_reg_offset[i].mem_size, 0);

		WREG32(amdgpu_gds_reg_offset[i].gws, 0);

		WREG32(amdgpu_gds_reg_offset[i].oa, 0);

	}

}



static void gfx_v7_0_config_init(struct amdgpu_device *adev)

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