Commit 4d273c2a authored by Douglas Anderson's avatar Douglas Anderson Committed by Felipe Balbi
Browse files

usb: dwc2: host: Protect PCGCTL with lock in dwc2_port_resume() 



From code inspection, it appears to be unsafe to do a read-modify-write
of PCGCTL in dwc2_port_resume().  Let's make sure the spinlock is held
around this operation.

Acked-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 3bbafac8

drivers/usb/dwc2/hcd.c

+4 −1
Original line number Diff line number Diff line
@@ -1500,6 +1500,8 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg) 
	u32 hprt0;

	u32 pcgctl;



	spin_lock_irqsave(&hsotg->lock, flags);



	/*

	 * If hibernation is supported, Phy clock is already resumed

	 * after registers restore.
@@ -1508,10 +1510,11 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg) 
		pcgctl = dwc2_readl(hsotg->regs + PCGCTL);

		pcgctl &= ~PCGCTL_STOPPCLK;

		dwc2_writel(pcgctl, hsotg->regs + PCGCTL);

		spin_unlock_irqrestore(&hsotg->lock, flags);

		usleep_range(20000, 40000);

		spin_lock_irqsave(&hsotg->lock, flags);

	}



	spin_lock_irqsave(&hsotg->lock, flags);

	hprt0 = dwc2_read_hprt0(hsotg);

	hprt0 |= HPRT0_RES;

	hprt0 &= ~HPRT0_SUSP;

CRA Git | Maintained and supported by SUSTech CRA and CCSE