Commit 4d19505e authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Allow ICL+ DSI on any pipe 



There are no longer any pipe<->DSI port limitations on icl+.
Populate the pipe_mask accordingly.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191002162505.30716-4-ville.syrjala@linux.intel.com


Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 981329ce

drivers/gpu/drm/i915/display/icl_dsi.c

+3 −1
Original line number Diff line number Diff line
@@ -1552,6 +1552,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) 
	struct drm_connector *connector;

	struct drm_display_mode *fixed_mode;

	enum port port;

	enum pipe pipe;



	if (!intel_bios_is_dsi_present(dev_priv, &port))

		return;
@@ -1584,7 +1585,8 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) 
	encoder->get_hw_state = gen11_dsi_get_hw_state;

	encoder->type = INTEL_OUTPUT_DSI;

	encoder->cloneable = 0;

	encoder->pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);

	for_each_pipe(dev_priv, pipe)

		encoder->pipe_mask |= BIT(pipe);

	encoder->power_domain = POWER_DOMAIN_PORT_DSI;

	encoder->get_power_domains = gen11_dsi_get_power_domains;

CRA Git | Maintained and supported by SUSTech CRA and CCSE