Commit 4cf643a3 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-next-5.3-2019-06-27' of git://people.freedesktop.org/~agd5f/linux into drm-next



drm-next-5.3-2019-06-27:

amdgpu:
- Fix warning on 32 bit ARM
- Fix compilation on big endian
- Misc bug fixes

ttm:
- Live lock fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628015555.3384-1-alexander.deucher@amd.com
parents 44c15367 440e80ce
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+1 −1
Original line number Diff line number Diff line
@@ -702,7 +702,7 @@ MODULE_PARM_DESC(hws_gws_support, "MEC FW support gws barriers (false = not supp
  * DOC: queue_preemption_timeout_ms (int)
  * queue preemption timeout in ms (1 = Minimum, 9000 = default)
  */
int queue_preemption_timeout_ms;
int queue_preemption_timeout_ms = 9000;
module_param(queue_preemption_timeout_ms, int, 0644);
MODULE_PARM_DESC(queue_preemption_timeout_ms, "queue preemption timeout in ms (1 = Minimum, 9000 = default)");
#endif
+4 −2
Original line number Diff line number Diff line
@@ -2886,7 +2886,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
		return ret;
	}
	/* APU does not have its own dedicated memory */
	if (!(adev->flags & AMD_IS_APU)) {
	if (!(adev->flags & AMD_IS_APU) &&
	     (adev->asic_type != CHIP_VEGA10)) {
		ret = device_create_file(adev->dev,
				&dev_attr_mem_busy_percent);
		if (ret) {
@@ -2966,7 +2967,8 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
		device_remove_file(adev->dev,
				&dev_attr_pp_od_clk_voltage);
	device_remove_file(adev->dev, &dev_attr_gpu_busy_percent);
	if (!(adev->flags & AMD_IS_APU))
	if (!(adev->flags & AMD_IS_APU) &&
	     (adev->asic_type != CHIP_VEGA10))
		device_remove_file(adev->dev, &dev_attr_mem_busy_percent);
	if (!(adev->flags & AMD_IS_APU))
		device_remove_file(adev->dev, &dev_attr_pcie_bw);
+0 −3
Original line number Diff line number Diff line
@@ -2624,9 +2624,6 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev)
	rb_bufsz = order_base_2(ring->ring_size / 8);
	tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz);
	tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2);
#ifdef __BIG_ENDIAN
	tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, BUF_SWAP, 1);
#endif
	WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp);
	/* Initialize the ring buffer's write pointers */
	ring->wptr = 0;
+2 −2
Original line number Diff line number Diff line
@@ -1010,8 +1010,8 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_device *adev, bool indirect)

	if (indirect)
		psp_update_vcn_sram(adev, 0, adev->vcn.dpg_sram_gpu_addr,
			(uint32_t)((uint64_t)adev->vcn.dpg_sram_curr_addr -
			(uint64_t)adev->vcn.dpg_sram_cpu_addr));
				    (uint32_t)((uintptr_t)adev->vcn.dpg_sram_curr_addr -
					       (uintptr_t)adev->vcn.dpg_sram_cpu_addr));

	/* force RBC into idle state */
	rb_bufsz = order_base_2(ring->ring_size);
+0 −1
Original line number Diff line number Diff line
@@ -738,7 +738,6 @@ int kgd2kfd_post_reset(struct kfd_dev *kfd)
	if (ret)
		return ret;
	count = atomic_dec_return(&kfd_locked);
	WARN_ONCE(count != 0, "KFD reset ref. error");

	atomic_set(&kfd->sram_ecc_flag, 0);

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