Commit 4ced08b8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 5241/1: provide ioremap_wc()
  [ARM] omap: fix virtual vs physical address space confusions
  [ARM] remove unused #include <version.h>
  [ARM] omap: fix build error in ohci-omap.c
  [ARM] omap: fix gpio.c build error
parents e1d7bf14 1ad77a87

arch/arm/include/asm/io.h

+4 −1
Original line number Diff line number Diff line
@@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 
#define MT_DEVICE_NONSHARED	1

#define MT_DEVICE_CACHED	2

#define MT_DEVICE_IXP2000	3

#define MT_DEVICE_WC		4

/*

 * types 4 onwards can be found in asm/mach/map.h and are undefined

 * types 5 onwards can be found in asm/mach/map.h and are undefined

 * for ioremap

 */
@@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
#define ioremap(cookie,size)		__arm_ioremap(cookie, size, MT_DEVICE)

#define ioremap_nocache(cookie,size)	__arm_ioremap(cookie, size, MT_DEVICE)

#define ioremap_cached(cookie,size)	__arm_ioremap(cookie, size, MT_DEVICE_CACHED)

#define ioremap_wc(cookie,size)		__arm_ioremap(cookie, size, MT_DEVICE_WC)

#define iounmap(cookie)			__iounmap(cookie)

#else

#define ioremap(cookie,size)		__arch_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_nocache(cookie,size)	__arch_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_cached(cookie,size)	__arch_ioremap((cookie), (size), MT_DEVICE_CACHED)

#define ioremap_wc(cookie,size)		__arch_ioremap((cookie), (size), MT_DEVICE_WC)

#define iounmap(cookie)			__arch_iounmap(cookie)

#endif

arch/arm/include/asm/mach/map.h

+7 −7
Original line number Diff line number Diff line
@@ -18,13 +18,13 @@ struct map_desc { 
	unsigned int type;

};



/* types 0-3 are defined in asm/io.h */

#define MT_CACHECLEAN		4

#define MT_MINICLEAN		5

#define MT_LOW_VECTORS		6

#define MT_HIGH_VECTORS		7

#define MT_MEMORY		8

#define MT_ROM			9

/* types 0-4 are defined in asm/io.h */

#define MT_CACHECLEAN		5

#define MT_MINICLEAN		6

#define MT_LOW_VECTORS		7

#define MT_HIGH_VECTORS		8

#define MT_MEMORY		9

#define MT_ROM			10



#define MT_NONSHARED_DEVICE	MT_DEVICE_NONSHARED

#define MT_IXP2000_DEVICE	MT_DEVICE_IXP2000

arch/arm/mach-omap1/mcbsp.c

+8 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { 
#ifdef CONFIG_ARCH_OMAP730

static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {

	{

		.phys_base	= OMAP730_MCBSP1_BASE,

		.virt_base	= io_p2v(OMAP730_MCBSP1_BASE),

		.dma_rx_sync	= OMAP_DMA_MCBSP1_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP1_TX,
@@ -167,6 +168,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 
		.ops		= &omap1_mcbsp_ops,

	},

	{

		.phys_base	= OMAP730_MCBSP2_BASE,

		.virt_base	= io_p2v(OMAP730_MCBSP2_BASE),

		.dma_rx_sync	= OMAP_DMA_MCBSP3_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP3_TX,
@@ -184,6 +186,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 
#ifdef CONFIG_ARCH_OMAP15XX

static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {

	{

		.phys_base	= OMAP1510_MCBSP1_BASE,

		.virt_base	= OMAP1510_MCBSP1_BASE,

		.dma_rx_sync	= OMAP_DMA_MCBSP1_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP1_TX,
@@ -193,6 +196,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 
		.clk_name	= "mcbsp_clk",

		},

	{

		.phys_base	= OMAP1510_MCBSP2_BASE,

		.virt_base	= io_p2v(OMAP1510_MCBSP2_BASE),

		.dma_rx_sync	= OMAP_DMA_MCBSP2_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP2_TX,
@@ -201,6 +205,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 
		.ops		= &omap1_mcbsp_ops,

	},

	{

		.phys_base	= OMAP1510_MCBSP3_BASE,

		.virt_base	= OMAP1510_MCBSP3_BASE,

		.dma_rx_sync	= OMAP_DMA_MCBSP3_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP3_TX,
@@ -219,6 +224,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 
#ifdef CONFIG_ARCH_OMAP16XX

static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {

	{

		.phys_base	= OMAP1610_MCBSP1_BASE,

		.virt_base	= OMAP1610_MCBSP1_BASE,

		.dma_rx_sync	= OMAP_DMA_MCBSP1_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP1_TX,
@@ -228,6 +234,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 
		.clk_name	= "mcbsp_clk",

	},

	{

		.phys_base	= OMAP1610_MCBSP2_BASE,

		.virt_base	= io_p2v(OMAP1610_MCBSP2_BASE),

		.dma_rx_sync	= OMAP_DMA_MCBSP2_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP2_TX,
@@ -236,6 +243,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 
		.ops		= &omap1_mcbsp_ops,

	},

	{

		.phys_base	= OMAP1610_MCBSP3_BASE,

		.virt_base	= OMAP1610_MCBSP3_BASE,

		.dma_rx_sync	= OMAP_DMA_MCBSP3_RX,

		.dma_tx_sync	= OMAP_DMA_MCBSP3_TX,

arch/arm/mach-omap2/mcbsp.c

+4 −0
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ static struct omap_mcbsp_ops omap2_mcbsp_ops = { 
#ifdef CONFIG_ARCH_OMAP24XX

static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {

	{

		.phys_base	= OMAP24XX_MCBSP1_BASE,

		.virt_base	= IO_ADDRESS(OMAP24XX_MCBSP1_BASE),

		.dma_rx_sync	= OMAP24XX_DMA_MCBSP1_RX,

		.dma_tx_sync	= OMAP24XX_DMA_MCBSP1_TX,
@@ -143,6 +144,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 
		.clk_name	= "mcbsp_clk",

	},

	{

		.phys_base	= OMAP24XX_MCBSP2_BASE,

		.virt_base	= IO_ADDRESS(OMAP24XX_MCBSP2_BASE),

		.dma_rx_sync	= OMAP24XX_DMA_MCBSP2_RX,

		.dma_tx_sync	= OMAP24XX_DMA_MCBSP2_TX,
@@ -161,6 +163,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 
#ifdef CONFIG_ARCH_OMAP34XX

static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {

	{

		.phys_base	= OMAP34XX_MCBSP1_BASE,

		.virt_base	= IO_ADDRESS(OMAP34XX_MCBSP1_BASE),

		.dma_rx_sync	= OMAP24XX_DMA_MCBSP1_RX,

		.dma_tx_sync	= OMAP24XX_DMA_MCBSP1_TX,
@@ -170,6 +173,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.clk_name	= "mcbsp_clk",

	},

	{

		.phys_base	= OMAP34XX_MCBSP2_BASE,

		.virt_base	= IO_ADDRESS(OMAP34XX_MCBSP2_BASE),

		.dma_rx_sync	= OMAP24XX_DMA_MCBSP2_RX,

		.dma_tx_sync	= OMAP24XX_DMA_MCBSP2_TX,

arch/arm/mm/mmu.c

+20 −0
Original line number Diff line number Diff line
@@ -211,6 +211,12 @@ static struct mem_type mem_types[] = { 
				  PMD_SECT_TEX(1),

		.domain		= DOMAIN_IO,

	},

	[MT_DEVICE_WC] = {	/* ioremap_wc */

		.prot_pte	= PROT_PTE_DEVICE,

		.prot_l1	= PMD_TYPE_TABLE,

		.prot_sect	= PROT_SECT_DEVICE,

		.domain		= DOMAIN_IO,

	},

	[MT_CACHECLEAN] = {

		.prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,

		.domain    = DOMAIN_KERNEL,
@@ -272,6 +278,20 @@ static void __init build_mem_type_table(void) 
		ecc_mask = 0;

	}



	/*

	 * On non-Xscale3 ARMv5-and-older systems, use CB=01

	 * (Uncached/Buffered) for ioremap_wc() mappings.  On XScale3

	 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable

	 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).

	 */

	if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {

		mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);

		mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);

	} else {

		mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;

		mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;

	}



	/*

	 * ARMv5 and lower, bit 4 must be set for page tables.

	 * (was: cache "update-able on write" bit on ARM610)

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