Commit 4cbe1bfa authored by Daniel Thompson's avatar Daniel Thompson Committed by Dave Airlie
Browse files

drm: Add 800x600 (SVGA) screen resolution to the built-in EDIDs 



The 800x600 (SVGA) screen resolution was lacking in the set of
built-in selectable EDID screen resolutions that can be used to
repair misbehaving monitor firmware.

This patch adds the related data set and expands the documentation.
Note that the SVGA bit occupies a different byte to all the existing
users of the established timing bits forcing a rework of the
ESTABLISHED_TIMINGS_BITS macro.

Tested new EDID on an aged (and misbehaving) industrial LCD panel;
existing EDIDs still pass edid-decode's checksum checks.

Signed-off-by: default avatarDaniel Thompson <daniel.thompson@linaro.org>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: David Airlie <airlied@linux.ie>
Cc: Carsten Emde <C.Emde@osadl.org>
Cc: linux-doc@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 9a6594fc

Documentation/EDID/1024x768.S

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
#define DPI 72

#define VFREQ 60 /* Hz */

#define TIMING_NAME "Linux XGA"

#define ESTABLISHED_TIMINGS_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */

#define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */

#define HSYNC_POL 0

#define VSYNC_POL 0

#define CRC 0x55

Documentation/EDID/1280x1024.S

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
#define DPI 72

#define VFREQ 60 /* Hz */

#define TIMING_NAME "Linux SXGA"

#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */

/* No ESTABLISHED_TIMINGx_BITS */

#define HSYNC_POL 1

#define VSYNC_POL 1

#define CRC 0xa0

Documentation/EDID/1600x1200.S

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
#define DPI 72

#define VFREQ 60 /* Hz */

#define TIMING_NAME "Linux UXGA"

#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */

/* No ESTABLISHED_TIMINGx_BITS */

#define HSYNC_POL 1

#define VSYNC_POL 1

#define CRC 0x9d

Documentation/EDID/1680x1050.S

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
#define DPI 96

#define VFREQ 60 /* Hz */

#define TIMING_NAME "Linux WSXGA"

#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */

/* No ESTABLISHED_TIMINGx_BITS */

#define HSYNC_POL 1

#define VSYNC_POL 1

#define CRC 0x26

Documentation/EDID/1920x1080.S

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
#define DPI 96

#define VFREQ 60 /* Hz */

#define TIMING_NAME "Linux FHD"

#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */

/* No ESTABLISHED_TIMINGx_BITS */

#define HSYNC_POL 1

#define VSYNC_POL 1

#define CRC 0x05

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