Commit 4cafc5d9 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-5.8-arm64-dt-v2' of...

Merge tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.8-rc1

This contains a couple of fixes for minor issues, enables XUDC support
on Tegra194, and enables EMC frequency scaling and video capture on
Tegra210.

* tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1
  arm64: tegra: Make the RTC a wakeup source on Jetson TX2
  arm64: tegra: Enable VI I2C on Jetson Nano
  arm64: tegra: Fix flag for 64-bit resources in 'ranges' property
  arm64: tegra: Add Tegra VI CSI support in device tree
  arm64: tegra: Add reset-cells to memory controller
  arm64: tegra: Fix SOR powergate clocks and reset
  arm64: tegra: Allow the PMIC RTC to wakeup Jetson Xavier
  arm64: tegra: Fix ethernet phy-mode for Jetson Xavier
  arm64: tegra: Hook up EMC cooling device
  arm64: tegra: Add external memory controller node for Tegra210
  arm64: tegra: Add XUDC node on Tegra194
  arm64: tegra: Kill off "simple-panel" compatibles

Link: https://lore.kernel.org/r/20200522142846.2376224-3-thierry.reding@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 34a07a8d 358a6777
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+1 −1
Original line number Diff line number Diff line
@@ -990,7 +990,7 @@
	};

	panel: panel {
		compatible = "innolux,n116bge", "simple-panel";
		compatible = "innolux,n116bge";
		backlight = <&backlight>;
		ddc-i2c-bus = <&dpaux>;
	};
+2 −1
Original line number Diff line number Diff line
@@ -221,7 +221,8 @@
				compatible = "maxim,max77620";
				reg = <0x3c>;

				interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pmc>;
				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
				#interrupt-cells = <2>;
				interrupt-controller;

+3 −2
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@

			phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
			phy-handle = <&phy>;
			phy-mode = "rgmii";
			phy-mode = "rgmii-id";

			mdio {
				#address-cells = <1>;
@@ -111,7 +111,8 @@
				compatible = "maxim,max20024";
				reg = <0x3c>;

				interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pmc>;
				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
				#interrupt-cells = <2>;
				interrupt-controller;

+24 −6
Original line number Diff line number Diff line
@@ -644,6 +644,24 @@
			};
		};

		usb@3550000 {
			compatible = "nvidia,tegra194-xudc";
			reg = <0x03550000 0x8000>,
			      <0x03558000 0x1000>;
			reg-names = "base", "fpci";
			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_DEV>,
				 <&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
				 <&bpmp TEGRA194_CLK_XUSB_SS>,
				 <&bpmp TEGRA194_CLK_XUSB_FS>;
			clock-names = "dev", "ss", "ss_src", "fs_src";
			power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>,
					<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
			power-domain-names = "dev", "ss";
			nvidia,xusb-padctl = <&xusb_padctl>;
			status = "disabled";
		};

		usb@3610000 {
			compatible = "nvidia,tegra194-xusb";
			reg = <0x03610000 0x40000>,
@@ -1387,7 +1405,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x30100000 0x0  0x30100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0x82000000 0x0  0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
	};

@@ -1432,7 +1450,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x32100000 0x0  0x32100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0x82000000 0x0  0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
	};

@@ -1477,7 +1495,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x34100000 0x0  0x34100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000   /* prefetchable memory (768MB) */
			  0x82000000 0x0  0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
	};

@@ -1522,7 +1540,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x36100000 0x0  0x36100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0x82000000 0x0  0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
	};

@@ -1567,7 +1585,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x38100000 0x0  0x38100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0x82000000 0x0  0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
	};

@@ -1616,7 +1634,7 @@

		bus-range = <0x0 0xff>;
		ranges = <0x81000000 0x0  0x3a100000 0x0  0x3a100000 0x0 0x00100000   /* downstream I/O (1MB) */
			  0xc2000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000   /* prefetchable memory (13GB) */
			  0x82000000 0x0  0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
	};

+2 −1
Original line number Diff line number Diff line
@@ -38,7 +38,8 @@
		pmic: pmic@3c {
			compatible = "maxim,max77620";
			reg = <0x3c>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&tegra_pmc>;
			interrupts = <51 IRQ_TYPE_LEVEL_LOW>;

			#interrupt-cells = <2>;
			interrupt-controller;
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