Commit 4cae9ae0 authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter
Browse files

drm/i915: add Haswell devices and their PCI IDs 



This adds product definitions for desktop, mobile and server boards.

v2: split into a separate patch, add .has_pch_split feature.

Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7e508a27

drivers/char/agp/intel-agp.h

+11 −0
Original line number Diff line number Diff line
@@ -237,6 +237,17 @@ 
#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG		0x015A

#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB		0x0F00 /* VLV1 */

#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG		0x0F30

#define PCI_DEVICE_ID_INTEL_HASWELL_HB				0x0400 /* Desktop */

#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG		0x0402

#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG		0x0412

#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB			0x0404 /* Mobile */

#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG		0x0406

#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG		0x0416

#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB			0x0408 /* Server */

#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG		0x040a

#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG		0x041a

#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */

#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04



int intel_gmch_probe(struct pci_dev *pdev,

			       struct agp_bridge_data *bridge);

drivers/char/agp/intel-gtt.c

+14 −0
Original line number Diff line number Diff line
@@ -1488,6 +1488,20 @@ static const struct intel_gtt_driver_description { 
	    "Ivybridge", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG,

	    "ValleyView", &valleyview_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,

	    "Haswell", &sandybridge_gtt_driver },

	{ PCI_DEVICE_ID_INTEL_HASWELL_SDV,

	    "Haswell", &sandybridge_gtt_driver },

	{ 0, NULL, NULL }

};

drivers/gpu/drm/i915/i915_drv.c

+18 −0
Original line number Diff line number Diff line
@@ -278,6 +278,24 @@ static const struct intel_device_info intel_valleyview_d_info = { 
	.is_valleyview = 1,

};



static const struct intel_device_info intel_haswell_d_info = {

	.is_haswell = 1, .gen = 7,

	.need_gfx_hws = 1, .has_hotplug = 1,

	.has_bsd_ring = 1,

	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

};



static const struct intel_device_info intel_haswell_m_info = {

	.is_haswell = 1, .gen = 7, .is_mobile = 1,

	.need_gfx_hws = 1, .has_hotplug = 1,

	.has_bsd_ring = 1,

	.has_blt_ring = 1,

	.has_llc = 1,

	.has_pch_split = 1,

};



static const struct pci_device_id pciidlist[] = {		/* aka */

	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */

	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -257,6 +257,7 @@ struct intel_device_info { 
	u8 is_ivybridge:1;

	u8 is_valleyview:1;

	u8 has_pch_split:1;

	u8 is_haswell:1;

	u8 has_fbc:1;

	u8 has_pipe_cxsr:1;

	u8 has_hotplug:1;
@@ -1009,6 +1010,7 @@ struct drm_i915_file_private { 
#define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)

#define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)->is_ivybridge)

#define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)->is_valleyview)

#define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)

#define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)



/*

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