Commit 4c881451 authored Jan 03, 2017 by James Hogan Committed by Radim Krčmář Jan 05, 2017

KVM: MIPS: Don't clobber CP0_Status.UX



On 64-bit kernels, MIPS KVM will clear CP0_Status.UX to prevent the
guest (running in user mode) from accessing the 64-bit memory segments.
However the previous value of CP0_Status.UX is never restored when
exiting from the guest.

If the user process uses 64-bit addressing (the n64 ABI) this can result
in address error exceptions from the kernel if it needs to deliver a
signal before returning to user mode, as the kernel will need to write a
sigframe to high user addresses on the user stack which are disallowed
by CP0_Status.UX=0.

This is fixed by explicitly setting SX and UX again when exiting from
the guest, and explicitly clearing those bits when returning to the
guest. Having the SX and UX bits set when handling guest exits (rather
than only when exiting to userland) will be helpful when we support VZ,
since we shouldn't need to directly read or write guest memory, so it
will be valid for cache management IPIs to access host user addresses.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: <stable@vger.kernel.org> # 4.8.x-
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>

parent 6ef4e07e

arch/mips/kvm/entry.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -521,6 +521,9 @@ void kvm_mips_build_exit(void addr)
		uasm_i_and(&p, V0, V0, AT);
		uasm_i_lui(&p, AT, ST0_CU0 >> 16);
		uasm_i_or(&p, V0, V0, AT);
		#ifdef CONFIG_64BIT
		uasm_i_ori(&p, V0, V0, ST0_SX \| ST0_UX);
		#endif
		uasm_i_mtc0(&p, V0, C0_STATUS);
		uasm_i_ehb(&p);

		@@ -643,7 +646,7 @@ static void kvm_mips_build_ret_to_guest(void addr)

		/* Setup status register for running guest in UM */
		uasm_i_ori(&p, V1, V1, ST0_EXL \| KSU_USER \| ST0_IE);
		UASM_i_LA(&p, AT, ~(ST0_CU0 \| ST0_MX));
		UASM_i_LA(&p, AT, ~(ST0_CU0 \| ST0_MX \| ST0_SX \| ST0_UX));
		uasm_i_and(&p, V1, V1, AT);
		uasm_i_mtc0(&p, V1, C0_STATUS);
		uasm_i_ehb(&p);

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