Commit 4c696ecf authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: enable voltage control by default for dgpu. 



Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ce4286bf

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c

+3 −6
Original line number Diff line number Diff line
@@ -80,20 +80,17 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle) 
		switch (hwmgr->chip_id) {

		case CHIP_TOPAZ:

			topaz_set_asic_special_caps(hwmgr);

			hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK |

						PP_VBI_TIME_SUPPORT_MASK |

			hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK |

						PP_ENABLE_GFX_CG_THRU_SMU);

			hwmgr->pp_table_version = PP_TABLE_V0;

			break;

		case CHIP_TONGA:

			tonga_set_asic_special_caps(hwmgr);

			hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK |

						PP_VBI_TIME_SUPPORT_MASK);

			hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK;

			break;

		case CHIP_FIJI:

			fiji_set_asic_special_caps(hwmgr);

			hwmgr->feature_mask &= ~(PP_SMC_VOLTAGE_CONTROL_MASK |

						PP_VBI_TIME_SUPPORT_MASK |

			hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK |

						PP_ENABLE_GFX_CG_THRU_SMU);

			break;

		case CHIP_POLARIS11:

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