drm/amdgpu: move sdma ecc functions to generic sdma file (4c65dd10) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

+28 −0

Original line number	Diff line number	Diff line
		@@ -135,3 +135,31 @@ free:
		adev->sdma.ras_if = NULL;
		return r;
		}

		int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
		void *err_data,
		struct amdgpu_iv_entry *entry)
		{
		kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
		amdgpu_ras_reset_gpu(adev, 0);

		return AMDGPU_RAS_SUCCESS;
		}

		int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
		struct amdgpu_irq_src *source,
		struct amdgpu_iv_entry *entry)
		{
		struct ras_common_if *ras_if = adev->sdma.ras_if;
		struct ras_dispatch_if ih_data = {
		.entry = entry,
		};

		if (!ras_if)
		return 0;

		ih_data.head = *ras_if;

		amdgpu_ras_interrupt_dispatch(adev, &ih_data);
		return 0;
		}

+6 −0

Original line number	Diff line number	Diff line
		@@ -106,4 +106,10 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring ring, uint32_t index);
		uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);
		int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
		void *ras_ih_info);
		int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
		void *err_data,
		struct amdgpu_iv_entry *entry);
		int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
		struct amdgpu_irq_src *source,
		struct amdgpu_iv_entry *entry);
		#endif

+2 −22

Original line number	Diff line number	Diff line
		@@ -1961,32 +1961,12 @@ static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev,
		return 0;
		}

		kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);

		amdgpu_ras_reset_gpu(adev, 0);
		amdgpu_sdma_process_ras_data_cb(adev, err_data, entry);
		}

		return AMDGPU_RAS_SUCCESS;
		}

		static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev,
		struct amdgpu_irq_src *source,
		struct amdgpu_iv_entry *entry)
		{
		struct ras_common_if *ras_if = adev->sdma.ras_if;
		struct ras_dispatch_if ih_data = {
		.entry = entry,
		};

		if (!ras_if)
		return 0;

		ih_data.head = *ras_if;

		amdgpu_ras_interrupt_dispatch(adev, &ih_data);
		return 0;
		}

		static int sdma_v4_0_process_illegal_inst_irq(struct amdgpu_device *adev,
		struct amdgpu_irq_src *source,
		struct amdgpu_iv_entry *entry)
		@@ -2334,7 +2314,7 @@ static const struct amdgpu_irq_src_funcs sdma_v4_0_illegal_inst_irq_funcs = {

		static const struct amdgpu_irq_src_funcs sdma_v4_0_ecc_irq_funcs = {
		.set = sdma_v4_0_set_ecc_irq_state,
		.process = sdma_v4_0_process_ecc_irq,
		.process = amdgpu_sdma_process_ecc_irq,
		};