Commit 4c5717da authored May 25, 2018 by Tony Luck Committed by Thomas Gleixner Jun 07, 2018

x86/mce: Check for alternate indication of machine check recovery on Skylake



Currently we just check the "CAPID0" register to see whether the CPU
can recover from machine checks.

But there are also some special SKUs which do not have all advanced
RAS features, but do enable machine check recovery for use with NVDIMMs.

Add a check for any of bits {8:5} in the "CAPID5" register (each
reports some NVDIMM mode available, if any of them are set, then
the system supports memory machine check recovery).

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: stable@vger.kernel.org # 4.9
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/03cbed6e99ddafb51c2eadf9a3b7c8d7a0cc204e.1527283897.git.tony.luck@intel.com

parent c7d606f5

arch/x86/kernel/quirks.c

+9 −2

Original line number	Diff line number	Diff line
		@@ -645,12 +645,19 @@ static void quirk_intel_brickland_xeon_ras_cap(struct pci_dev *pdev)
		/* Skylake */
		static void quirk_intel_purley_xeon_ras_cap(struct pci_dev *pdev)
		{
		u32 capid0;
		u32 capid0, capid5;

		pci_read_config_dword(pdev, 0x84, &capid0);
		pci_read_config_dword(pdev, 0x98, &capid5);

		if ((capid0 & 0xc0) == 0xc0)
		/*
		* CAPID0{7:6} indicate whether this is an advanced RAS SKU
		* CAPID5{8:5} indicate that various NVDIMM usage modes are
		* enabled, so memory machine check recovery is also enabled.
		*/
		if ((capid0 & 0xc0) == 0xc0 \|\| (capid5 & 0x1e0))
		static_branch_inc(&mcsafe_key);

		}
		DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x0ec3, quirk_intel_brickland_xeon_ras_cap);
		DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2fc0, quirk_intel_brickland_xeon_ras_cap);

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