Commit 4c0742f6 authored by Vladimir Murzin's avatar Vladimir Murzin Committed by Russell King
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ARM: 8914/1: NOMMU: Fix exc_ret for XIP



It was reported that 72cd4064 "NOMMU: Toggle only bits in
EXC_RETURN we are really care of" breaks NOMMU+XIP combination.
It happens because saved EXC_RETURN gets overwritten when data
section is relocated.

The fix is to propagate EXC_RETURN via register and let relocation
code to commit that value into memory.

Fixes: 72cd4064 ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of")
Reported-by: default avatarafzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: default avatarafzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
parent 851140ab
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+3 −2
Original line number Diff line number Diff line
@@ -68,7 +68,7 @@ ENDPROC(__vet_atags)
 * The following fragment of code is executed with the MMU on in MMU mode,
 * and uses absolute addresses; this is not position independent.
 *
 *  r0  = cp#15 control register
 *  r0  = cp#15 control register (exc_ret for M-class)
 *  r1  = machine ID
 *  r2  = atags/dtb pointer
 *  r9  = processor ID
@@ -137,7 +137,8 @@ __mmap_switched_data:
#ifdef CONFIG_CPU_CP15
	.long	cr_alignment			@ r3
#else
	.long	0				@ r3
M_CLASS(.long	exc_ret)			@ r3
AR_CLASS(.long	0)				@ r3
#endif
	.size	__mmap_switched_data, . - __mmap_switched_data

+2 −0
Original line number Diff line number Diff line
@@ -201,6 +201,8 @@ M_CLASS(streq r3, [r12, #PMSAv8_MAIR1])
	bic	r0, r0, #V7M_SCB_CCR_IC
#endif
	str	r0, [r12, V7M_SCB_CCR]
	/* Pass exc_ret to __mmap_switched */
	mov	r0, r10
#endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */
	ret	lr
ENDPROC(__after_proc_init)
+2 −3
Original line number Diff line number Diff line
@@ -136,9 +136,8 @@ __v7m_setup_cont:
	cpsie	i
	svc	#0
1:	cpsid	i
	ldr	r0, =exc_ret
	orr	lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
	str	lr, [r0]
	/* Calculate exc_ret */
	orr	r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
	ldmia	sp, {r0-r3, r12}
	str	r5, [r12, #11 * 4]	@ restore the original SVC vector entry
	mov	lr, r6			@ restore LR