gpio: Fix minor grammar errors in documentation

GPIO line, and this resistor is software controlled.

In discrete designs, a pull-up or pull-down resistor is simply soldered on

the circuit board. This is not something we deal or model in software. The

the circuit board. This is not something we deal with or model in software. The

most you will think about these lines is that they will very likely be

configured as open drain or open source (see the section above).

- HIERARCHICAL INTERRUPT CHIPS: this means that each GPIO line has a dedicated

  irq line to a parent interrupt controller one level up. There is no need

  to inquire the GPIO hardware to figure out which line has figured, but it

  may still be necessary to acknowledge the interrupt and set up the

  configuration such as edge sensitivity.

  to inquire the GPIO hardware to figure out which line has fired, but it

  may still be necessary to acknowledge the interrupt and set up configuration

  such as edge sensitivity.

Realtime considerations: a realtime compliant GPIO driver should not use

spinlock_t or any sleepable APIs (like PM runtime) as part of its irqchip

implementation.

- spinlock_t should be replaced with raw_spinlock_t [1].

- spinlock_t should be replaced with raw_spinlock_t.[1]

- If sleepable APIs have to be used, these can be done from the .irq_bus_lock()

  and .irq_bus_unlock() callbacks, as these are the only slowpath callbacks

  on an irqchip. Create the callbacks if needed [2].

  on an irqchip. Create the callbacks if needed.[2]

Cascaded GPIO irqchips

  Realtime considerations: this kind of handlers will be forced threaded on -RT,

  and as result the IRQ core will complain that generic_handle_irq() is called

  with IRQ enabled and the same work around as for "CHAINED GPIO irqchips" can

  with IRQ enabled and the same work-around as for "CHAINED GPIO irqchips" can

  be applied.

- NESTED THREADED GPIO IRQCHIPS: these are off-chip GPIO expanders and any