Commit 4b3cf448 authored by Anand Gadiyar's avatar Anand Gadiyar Committed by Tony Lindgren
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ARM: OMAP: Fix DMA CCR programming for request line > 63, v3 



Bug in existing code causes synchro control to be set +32 if request
line greater than 63 is used.

Also clean up the function a bit by removing extra parens and
clearing the bits at before write.

Reported by Wenbiao Wang.

Signed-off-by: default avatarAnand Gadiyar <gadiyar@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 3a26e331

arch/arm/plat-omap/dma.c

+5 −8
Original line number Diff line number Diff line
@@ -278,14 +278,11 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, 
		u32 val;



		val = dma_read(CCR(lch));

		val &= ~(3 << 19);

		if (dma_trigger > 63)

			val |= 1 << 20;

		if (dma_trigger > 31)

			val |= 1 << 19;



		val &= ~(0x1f);

		val |= (dma_trigger & 0x1f);



		/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */

		val &= ~((3 << 19) | 0x1f);

		val |= (dma_trigger & ~0x1f) << 14;

		val |= dma_trigger & 0x1f;



		if (sync_mode & OMAP_DMA_SYNC_FRAME)

			val |= 1 << 5;

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