Merge tag 'amd-drm-fixes-5.9-2020-09-17' of... (4b1ededb) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -178,7 +178,7 @@ static int psp_sw_init(void *handle)
		return ret;
		}

		if (adev->asic_type == CHIP_NAVI10) {
		if (adev->asic_type == CHIP_NAVI10 \|\| adev->asic_type == CHIP_SIENNA_CICHLID) {
		ret= psp_sysfs_init(adev);
		if (ret) {
		return ret;

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -58,7 +58,7 @@ MODULE_FIRMWARE("amdgpu/arcturus_ta.bin");
		MODULE_FIRMWARE("amdgpu/sienna_cichlid_sos.bin");
		MODULE_FIRMWARE("amdgpu/sienna_cichlid_ta.bin");
		MODULE_FIRMWARE("amdgpu/navy_flounder_sos.bin");
		MODULE_FIRMWARE("amdgpu/navy_flounder_asd.bin");
		MODULE_FIRMWARE("amdgpu/navy_flounder_ta.bin");

		/* address block */
		#define smnMP1_FIRMWARE_FLAGS 0x3010024

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -1216,6 +1216,8 @@ static int stop_cpsch(struct device_queue_manager *dqm)
		dqm->sched_running = false;
		dqm_unlock(dqm);

		pm_release_ib(&dqm->packets);

		kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
		pm_uninit(&dqm->packets, hanging);

		@@ -1326,7 +1328,7 @@ static int create_queue_cpsch(struct device_queue_manager dqm, struct queue q,
		if (q->properties.is_active) {
		increment_queue_count(dqm, q->properties.type);

		retval = execute_queues_cpsch(dqm,
		execute_queues_cpsch(dqm,
		KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
		}

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+10 −22

Original line number	Diff line number	Diff line
		@@ -5278,19 +5278,6 @@ static void dm_crtc_helper_disable(struct drm_crtc *crtc)
		{
		}

		static bool does_crtc_have_active_cursor(struct drm_crtc_state *new_crtc_state)
		{
		struct drm_device *dev = new_crtc_state->crtc->dev;
		struct drm_plane *plane;

		drm_for_each_plane_mask(plane, dev, new_crtc_state->plane_mask) {
		if (plane->type == DRM_PLANE_TYPE_CURSOR)
		return true;
		}

		return false;
		}

		static int count_crtc_active_planes(struct drm_crtc_state *new_crtc_state)
		{
		struct drm_atomic_state *state = new_crtc_state->state;
		@@ -5354,19 +5341,20 @@ static int dm_crtc_helper_atomic_check(struct drm_crtc *crtc,
		return ret;
		}

		/* In some use cases, like reset, no stream is attached */
		if (!dm_crtc_state->stream)
		return 0;

		/*
		* We want at least one hardware plane enabled to use
		* the stream with a cursor enabled.
		* We require the primary plane to be enabled whenever the CRTC is, otherwise
		* drm_mode_cursor_universal may end up trying to enable the cursor plane while all other
		* planes are disabled, which is not supported by the hardware. And there is legacy
		* userspace which stops using the HW cursor altogether in response to the resulting EINVAL.
		*/
		if (state->enable && state->active &&
		does_crtc_have_active_cursor(state) &&
		dm_crtc_state->active_planes == 0)
		if (state->enable &&
		!(state->plane_mask & drm_plane_mask(crtc->primary)))
		return -EINVAL;

		/* In some use cases, like reset, no stream is attached */
		if (!dm_crtc_state->stream)
		return 0;

		if (dc_validate_stream(dc, dm_crtc_state->stream) == DC_OK)
		return 0;

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -409,8 +409,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = {
		},
		},
		.num_states = 5,
		.sr_exit_time_us = 8.6,
		.sr_enter_plus_exit_time_us = 10.9,
		.sr_exit_time_us = 11.6,
		.sr_enter_plus_exit_time_us = 13.9,
		.urgent_latency_us = 4.0,
		.urgent_latency_pixel_data_only_us = 4.0,
		.urgent_latency_pixel_mixed_with_vm_data_us = 4.0,

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