Commit 4b0d29dc authored by Ben Hutchings's avatar Ben Hutchings Committed by David S. Miller
Browse files

sfc: Turn pause frame generation on and off at the MAC, not the RX FIFO 



Pause frame generation is gated by both RX_XOFF_MAC_EN and an enable
bit in each MAC.  RX_XOFF_MAC_EN bit always reads back as 0 so we need
to set it correctly every time we modify RX_CFG_REG.  Simplify this by
always setting it to 1 and only changing the enable bits in the MACs.

Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 674979d3

drivers/net/sfc/falcon.c

+6 −7
Original line number Diff line number Diff line
@@ -1939,7 +1939,6 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) 
	struct efx_link_state *link_state = &efx->link_state;

	efx_oword_t reg;

	int link_speed;

	bool tx_fc;



	switch (link_state->speed) {

	case 10000: link_speed = 3; break;
@@ -1969,13 +1968,10 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) 
	/* Restore the multicast hash registers. */

	falcon_push_multicast_hash(efx);



	/* Transmission of pause frames when RX crosses the threshold is

	 * covered by RX_XOFF_MAC_EN and XM_TX_CFG_REG:XM_FCNTL.

	 * Action on receipt of pause frames is controller by XM_DIS_FCNTL */

	tx_fc = !!(efx->link_state.fc & EFX_FC_TX);

	efx_reado(efx, &reg, FR_AZ_RX_CFG);

	EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, tx_fc);



	/* Enable XOFF signal from RX FIFO (we enabled it during NIC

	 * initialisation but it may read back as 0) */

	EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1);

	/* Unisolate the MAC -> RX */

	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)

		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1);
@@ -3000,6 +2996,9 @@ static void falcon_init_rx_cfg(struct efx_nic *efx) 
		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_TX_TH, ctrl_xoff_thr);

		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1);

	}

	/* Always enable XOFF signal from RX FIFO.  We enable

	 * or disable transmission of pause frames at the MAC. */

	EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1);

	efx_writeo(efx, &reg, FR_AZ_RX_CFG);

}

drivers/net/sfc/falcon_xmac.c

+2 −1
Original line number Diff line number Diff line
@@ -148,6 +148,7 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx) 
	unsigned int max_frame_len;

	efx_oword_t reg;

	bool rx_fc = !!(efx->link_state.fc & EFX_FC_RX);

	bool tx_fc = !!(efx->link_state.fc & EFX_FC_TX);



	/* Configure MAC  - cut-thru mode is hard wired on */

	EFX_POPULATE_OWORD_3(reg,
@@ -162,7 +163,7 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx) 
			     FRF_AB_XM_TX_PRMBL, 1,

			     FRF_AB_XM_AUTO_PAD, 1,

			     FRF_AB_XM_TXCRC, 1,

			     FRF_AB_XM_FCNTL, 1,

			     FRF_AB_XM_FCNTL, tx_fc,

			     FRF_AB_XM_IPG, 0x3);

	efx_writeo(efx, &reg, FR_AB_XM_TX_CFG);

CRA Git | Maintained and supported by SUSTech CRA and CCSE