clk: renesas: r8a774c0: Add Z2 clock (4aeed945) · Commits · 戴 / test

Adds support for RZ/G2E (r8a774c0) Z2 clock. Signed-off-by:

drivers/clk/renesas/r8a774c0-cpg-mssr.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -81,6 +81,7 @@ static const struct cpg_core_clk r8a774c0_core_clks[] __initconst = {
		/* Core Clock Outputs */
		DEF_FIXED("za2", R8A774C0_CLK_ZA2, CLK_PLL0D24, 1, 1),
		DEF_FIXED("za8", R8A774C0_CLK_ZA8, CLK_PLL0D8, 1, 1),
		DEF_GEN3_Z("z2", R8A774C0_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL0, 4, 8),
		DEF_FIXED("ztr", R8A774C0_CLK_ZTR, CLK_PLL1, 6, 1),
		DEF_FIXED("zt", R8A774C0_CLK_ZT, CLK_PLL1, 4, 1),
		DEF_FIXED("zx", R8A774C0_CLK_ZX, CLK_PLL1, 3, 1),