Merge tag 'samsung-dt-3' of... (4ac383ed) · Commits · 戴 / test

arch/arm/boot/dts/Makefile

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		@@ -62,10 +62,12 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
		exynos4412-odroidx.dtb \
		exynos4412-origen.dtb \
		exynos4412-smdk4412.dtb \
		exynos4412-tiny4412.dtb \
		exynos4412-trats2.dtb \
		exynos5250-arndale.dtb \
		exynos5250-smdk5250.dtb \
		exynos5250-snow.dtb \
		exynos5420-arndale-octa.dtb \
		exynos5420-smdk5420.dtb \
		exynos5440-sd5v1.dtb \
		exynos5440-ssdk5440.dtb

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		/*
		* FriendlyARM's Exynos4412 based TINY4412 board device tree source
		*
		* Copyright (c) 2013 Alex Ling <kasimling@gmail.com>
		*
		* Device tree source file for FriendlyARM's TINY4412 board which is based on
		* Samsung's Exynos4412 SoC.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		/dts-v1/;
		#include "exynos4412.dtsi"

		/ {
		model = "FriendlyARM TINY4412 board based on Exynos4412";
		compatible = "friendlyarm,tiny4412", "samsung,exynos4412";

		memory {
		reg = <0x40000000 0x40000000>;
		};

		leds {
		compatible = "gpio-leds";

		led1 {
		label = "led1";
		gpios = <&gpm4 0 1>;
		default-state = "off";
		linux,default-trigger = "heartbeat";
		};

		led2 {
		label = "led2";
		gpios = <&gpm4 1 1>;
		default-state = "off";
		};

		led3 {
		label = "led3";
		gpios = <&gpm4 2 1>;
		default-state = "off";
		};

		led4 {
		label = "led4";
		gpios = <&gpm4 3 1>;
		default-state = "off";
		linux,default-trigger = "mmc0";
		};
		};

		rtc@10070000 {
		status = "okay";
		};

		sdhci@12530000 {
		bus-width = <4>;
		pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
		pinctrl-names = "default";
		status = "okay";
		};

		serial@13800000 {
		status = "okay";
		};

		serial@13810000 {
		status = "okay";
		};

		serial@13820000 {
		status = "okay";
		};

		serial@13830000 {
		status = "okay";
		};

		fixed-rate-clocks {
		xxti {
		compatible = "samsung,clock-xxti";
		clock-frequency = <0>;
		};

		xusbxti {
		compatible = "samsung,clock-xusbxti";
		clock-frequency = <24000000>;
		};
		};
		};

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		/*
		* Samsung's Exynos5420 based Arndale Octa board device tree source
		*
		* Copyright (c) 2013 Samsung Electronics Co., Ltd.
		* http://www.samsung.com
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		/dts-v1/;
		#include "exynos5420.dtsi"

		/ {
		model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
		compatible = "insignal,arndale-octa", "samsung,exynos5420";

		memory {
		reg = <0x20000000 0x80000000>;
		};

		chosen {
		bootargs = "console=ttySAC3,115200";
		};

		fixed-rate-clocks {
		oscclk {
		compatible = "samsung,exynos5420-oscclk";
		clock-frequency = <24000000>;
		};
		};

		mmc@12200000 {
		status = "okay";
		broken-cd;
		supports-highspeed;
		card-detect-delay = <200>;
		samsung,dw-mshc-ciu-div = <3>;
		samsung,dw-mshc-sdr-timing = <0 4>;
		samsung,dw-mshc-ddr-timing = <0 2>;
		pinctrl-names = "default";
		pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;

		slot@0 {
		reg = <0>;
		bus-width = <8>;
		};
		};

		mmc@12220000 {
		status = "okay";
		supports-highspeed;
		card-detect-delay = <200>;
		samsung,dw-mshc-ciu-div = <3>;
		samsung,dw-mshc-sdr-timing = <2 3>;
		samsung,dw-mshc-ddr-timing = <1 2>;
		pinctrl-names = "default";
		pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;

		slot@0 {
		reg = <0>;
		bus-width = <4>;
		};
		};
		};