Commit 4a8573ab authored by Andy Gross's avatar Andy Gross Committed by Mark Brown
Browse files

spi: qup: Remove chip select function 



This patch removes the chip select function.  Chip select should instead be
supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
core assert/deassert the chip select as it sees fit.

The chip select control inside the controller is buggy.  It is supposed to
automatically assert the chip select based on the activity in the controller,
but it is buggy and doesn't work at all.  So instead we elect to use GPIOs.

Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 045c243a

Documentation/devicetree/bindings/spi/qcom,spi-qup.txt

+6 −0
Original line number Diff line number Diff line
@@ -23,6 +23,12 @@ Optional properties: 
- spi-max-frequency: Specifies maximum SPI clock frequency,

                     Units - Hz. Definition as per

                     Documentation/devicetree/bindings/spi/spi-bus.txt

- num-cs:	total number of chipselects

- cs-gpios:	should specify GPIOs used for chipselects.

		The gpios will be referred to as reg = <index> in the SPI child

		nodes.  If unspecified, a single SPI device without a chip

		select can be used.





SPI slave nodes must be children of the SPI master node and can contain

properties described in Documentation/devicetree/bindings/spi/spi-bus.txt

drivers/spi/spi-qup.c

+6 −27
Original line number Diff line number Diff line
@@ -424,31 +424,6 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) 
	return 0;

}



static void spi_qup_set_cs(struct spi_device *spi, bool enable)

{

	struct spi_qup *controller = spi_master_get_devdata(spi->master);



	u32 iocontol, mask;



	iocontol = readl_relaxed(controller->base + SPI_IO_CONTROL);



	/* Disable auto CS toggle and use manual */

	iocontol &= ~SPI_IO_C_MX_CS_MODE;

	iocontol |= SPI_IO_C_FORCE_CS;



	iocontol &= ~SPI_IO_C_CS_SELECT_MASK;

	iocontol |= SPI_IO_C_CS_SELECT(spi->chip_select);



	mask = SPI_IO_C_CS_N_POLARITY_0 << spi->chip_select;



	if (enable)

		iocontol |= mask;

	else

		iocontol &= ~mask;



	writel_relaxed(iocontol, controller->base + SPI_IO_CONTROL);

}



static int spi_qup_transfer_one(struct spi_master *master,

			      struct spi_device *spi,

			      struct spi_transfer *xfer)
@@ -571,12 +546,16 @@ static int spi_qup_probe(struct platform_device *pdev) 
		return -ENOMEM;

	}



	/* use num-cs unless not present or out of range */

	if (of_property_read_u16(dev->of_node, "num-cs",

			&master->num_chipselect) ||

			(master->num_chipselect > SPI_NUM_CHIPSELECTS))

		master->num_chipselect = SPI_NUM_CHIPSELECTS;



	master->bus_num = pdev->id;

	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;

	master->num_chipselect = SPI_NUM_CHIPSELECTS;

	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);

	master->max_speed_hz = max_freq;

	master->set_cs = spi_qup_set_cs;

	master->transfer_one = spi_qup_transfer_one;

	master->dev.of_node = pdev->dev.of_node;

	master->auto_runtime_pm = true;

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