Commit 4a5346df authored by Roman Li's avatar Roman Li Committed by Alex Deucher
Browse files

drm/amd/display: Add green_sardine support to DC 



Display Core support for green_sardine

Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Acked-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d83d3ad6

drivers/gpu/drm/amd/display/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -17,6 +17,14 @@ config DRM_AMD_DC_DCN 
	help

	  Raven, Navi and Renoir family support for display engine



config DRM_AMD_DC_GREEN_SARDINE

	bool "Green Sardine support"

	default y

	depends on DRM_AMD_DC_DCN

        help

            Choose this option if you want to have

            Green Sardine support for display engine



config DRM_AMD_DC_DCN3_0

        bool "DCN 3.0 family"

        depends on DRM_AMD_DC && X86

drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

+7 −0
Original line number Diff line number Diff line
@@ -166,6 +166,13 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p 
			rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);

			break;

		}



#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)

		if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev)) {

			rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);

			break;

		}

#endif

		if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) {

			rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);

			break;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+4 −0
Original line number Diff line number Diff line
@@ -120,6 +120,10 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) 
			dc_version = DCN_VERSION_1_01;

		if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev))

			dc_version = DCN_VERSION_2_1;

#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)

		if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev))

			dc_version = DCN_VERSION_2_1;

#endif

		break;

#endif

drivers/gpu/drm/amd/display/include/dal_asic_id.h

+6 −0
Original line number Diff line number Diff line
@@ -205,6 +205,12 @@ enum { 
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)

#define ASICREV_IS_SIENNA_CICHLID_P(eChipRev)        ((eChipRev >= NV_SIENNA_CICHLID_P_A0))

#endif

#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)

#define GREEN_SARDINE_A0 0xA1

#ifndef ASICREV_IS_GREEN_SARDINE

#define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF))

#endif

#endif



/*

 * ASIC chip ID

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