riscv: Add support to determine no. of L2 cache way enabled (4a3a3733) · Commits · 戴 / test

drivers/soc/sifive/sifive_l2_cache.c

+38 −0

Original line number	Diff line number	Diff line
		@@ -9,6 +9,8 @@
		#include <linux/interrupt.h>
		#include <linux/of_irq.h>
		#include <linux/of_address.h>
		#include <linux/device.h>
		#include <asm/cacheinfo.h>
		#include <soc/sifive/sifive_l2_cache.h>

		#define SIFIVE_L2_DIRECCFIX_LOW 0x100
		@@ -31,6 +33,7 @@

		static void __iomem *l2_base;
		static int g_irq[SIFIVE_L2_MAX_ECCINTR];
		static struct riscv_cacheinfo_ops l2_cache_ops;

		enum {
		DIR_CORR = 0,
		@@ -107,6 +110,38 @@ int unregister_sifive_l2_error_notifier(struct notifier_block *nb)
		}
		EXPORT_SYMBOL_GPL(unregister_sifive_l2_error_notifier);

		static int l2_largest_wayenabled(void)
		{
		return readl(l2_base + SIFIVE_L2_WAYENABLE) & 0xFF;
		}

		static ssize_t number_of_ways_enabled_show(struct device *dev,
		struct device_attribute *attr,
		char *buf)
		{
		return sprintf(buf, "%u\n", l2_largest_wayenabled());
		}

		static DEVICE_ATTR_RO(number_of_ways_enabled);

		static struct attribute *priv_attrs[] = {
		&dev_attr_number_of_ways_enabled.attr,
		NULL,
		};

		static const struct attribute_group priv_attr_group = {
		.attrs = priv_attrs,
		};

		const struct attribute_group l2_get_priv_group(struct cacheinfo this_leaf)
		{
		/* We want to use private group for L2 cache only */
		if (this_leaf->level == 2)
		return &priv_attr_group;
		else
		return NULL;
		}

		static irqreturn_t l2_int_handler(int irq, void *device)
		{
		unsigned int add_h, add_l;
		@@ -170,6 +205,9 @@ static int __init sifive_l2_init(void)

		l2_config_read();

		l2_cache_ops.get_priv_group = l2_get_priv_group;
		riscv_set_cacheinfo_ops(&l2_cache_ops);

		#ifdef CONFIG_DEBUG_FS
		setup_sifive_debug();
		#endif

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