Commit 4a13b4ce authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: clean up the APIs for pptable setup 



Combine and simplify the logics for setup pptable.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 12ea3449

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+0 −17
Original line number Diff line number Diff line
@@ -1114,23 +1114,6 @@ static int smu_smc_table_hw_init(struct smu_context *smu, 
		if (ret)

			return ret;



		/*

		 * check if the format_revision in vbios is up to pptable header

		 * version, and the structure size is not 0.

		 */

		ret = smu_check_pptable(smu);

		if (ret)

			return ret;



		/*

		 * Parse pptable format and fill PPTable_t smc_pptable to

		 * smu_table_context structure. And read the smc_dpm_table from vbios,

		 * then fill it into smc_pptable.

		 */

		ret = smu_parse_pptable(smu);

		if (ret)

			return ret;



		/*

		 * Send msg GetDriverIfVersion to check if the return value is equal

		 * with DRIVER_IF_VERSION of smc header.

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

+42 −24
Original line number Diff line number Diff line
@@ -489,33 +489,33 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu) 


static int arcturus_check_powerplay_table(struct smu_context *smu)

{

	struct smu_table_context *table_context = &smu->smu_table;

	struct smu_11_0_powerplay_table *powerplay_table =

		table_context->power_play_table;

	struct smu_baco_context *smu_baco = &smu->smu_baco;



	mutex_lock(&smu_baco->mutex);

	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||

	    powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)

		smu_baco->platform_support = true;

	mutex_unlock(&smu_baco->mutex);



	table_context->thermal_controller_type =

		powerplay_table->thermal_controller_type;



	return 0;

}



static int arcturus_store_powerplay_table(struct smu_context *smu)

{

	struct smu_11_0_powerplay_table *powerplay_table = NULL;

	struct smu_table_context *table_context = &smu->smu_table;

	struct smu_baco_context *smu_baco = &smu->smu_baco;

	int ret = 0;



	if (!table_context->power_play_table)

		return -EINVAL;



	powerplay_table = table_context->power_play_table;

	struct smu_11_0_powerplay_table *powerplay_table =

		table_context->power_play_table;



	memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,

	       sizeof(PPTable_t));



	table_context->thermal_controller_type = powerplay_table->thermal_controller_type;



	mutex_lock(&smu_baco->mutex);

	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||

	    powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)

		smu_baco->platform_support = true;

	mutex_unlock(&smu_baco->mutex);



	return ret;

	return 0;

}



static int arcturus_append_powerplay_table(struct smu_context *smu)
@@ -546,6 +546,29 @@ static int arcturus_append_powerplay_table(struct smu_context *smu) 
	return 0;

}



static int arcturus_setup_pptable(struct smu_context *smu)

{

	int ret = 0;



	ret = smu_v11_0_setup_pptable(smu);

	if (ret)

		return ret;



	ret = arcturus_store_powerplay_table(smu);

	if (ret)

		return ret;



	ret = arcturus_append_powerplay_table(smu);

	if (ret)

		return ret;



	ret = arcturus_check_powerplay_table(smu);

	if (ret)

		return ret;



	return ret;

}



static int arcturus_run_btc(struct smu_context *smu)

{

	int ret = 0;
@@ -2416,10 +2439,6 @@ static const struct pptable_funcs arcturus_ppt_funcs = { 
	/* internal structurs allocations */

	.tables_init = arcturus_tables_init,

	.alloc_dpm_context = arcturus_allocate_dpm_context,

	/* pptable related */

	.check_powerplay_table = arcturus_check_powerplay_table,

	.store_powerplay_table = arcturus_store_powerplay_table,

	.append_powerplay_table = arcturus_append_powerplay_table,

	/* init dpm */

	.get_allowed_feature_mask = arcturus_get_allowed_feature_mask,

	/* btc */
@@ -2455,10 +2474,9 @@ static const struct pptable_funcs arcturus_ppt_funcs = { 
	.init_power = smu_v11_0_init_power,

	.fini_power = smu_v11_0_fini_power,

	.check_fw_status = smu_v11_0_check_fw_status,

	.setup_pptable = smu_v11_0_setup_pptable,

	/* pptable related */

	.setup_pptable = arcturus_setup_pptable,

	.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,

	.check_pptable = smu_v11_0_check_pptable,

	.parse_pptable = smu_v11_0_parse_pptable,

	.populate_smc_tables = smu_v11_0_populate_smc_pptable,

	.check_fw_version = smu_v11_0_check_fw_version,

	.write_pptable = smu_v11_0_write_pptable,

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+0 −5
Original line number Diff line number Diff line
@@ -417,9 +417,6 @@ struct i2c_adapter; 


struct pptable_funcs {

	int (*alloc_dpm_context)(struct smu_context *smu);

	int (*store_powerplay_table)(struct smu_context *smu);

	int (*check_powerplay_table)(struct smu_context *smu);

	int (*append_powerplay_table)(struct smu_context *smu);

	int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index);

	int (*get_smu_clk_index)(struct smu_context *smu, uint32_t index);

	int (*get_smu_feature_index)(struct smu_context *smu, uint32_t index);
@@ -506,8 +503,6 @@ struct pptable_funcs { 
	int (*check_fw_status)(struct smu_context *smu);

	int (*setup_pptable)(struct smu_context *smu);

	int (*get_vbios_bootup_values)(struct smu_context *smu);

	int (*check_pptable)(struct smu_context *smu);

	int (*parse_pptable)(struct smu_context *smu);

	int (*populate_smc_tables)(struct smu_context *smu);

	int (*check_fw_version)(struct smu_context *smu);

	int (*powergate_sdma)(struct smu_context *smu, bool gate);

drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h

+0 −4
Original line number Diff line number Diff line
@@ -162,10 +162,6 @@ int smu_v11_0_setup_pptable(struct smu_context *smu); 


int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu);



int smu_v11_0_check_pptable(struct smu_context *smu);



int smu_v11_0_parse_pptable(struct smu_context *smu);



int smu_v11_0_populate_smc_pptable(struct smu_context *smu);



int smu_v11_0_check_fw_version(struct smu_context *smu);

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+47 −45
Original line number Diff line number Diff line
@@ -417,6 +417,29 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, 


static int navi10_check_powerplay_table(struct smu_context *smu)

{

	struct smu_table_context *table_context = &smu->smu_table;

	struct smu_11_0_powerplay_table *powerplay_table =

		table_context->power_play_table;

	struct smu_baco_context *smu_baco = &smu->smu_baco;



	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC)

		smu->dc_controlled_by_gpio = true;



	mutex_lock(&smu_baco->mutex);

	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||

	    powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)

		smu_baco->platform_support = true;

	mutex_unlock(&smu_baco->mutex);



	table_context->thermal_controller_type =

		powerplay_table->thermal_controller_type;



	/*

	 * Instead of having its own buffer space and get overdrive_table copied,

	 * smu->od_settings just points to the actual overdrive_table

	 */

	smu->od_settings = &powerplay_table->overdrive_table;



	return 0;

}
@@ -475,30 +498,37 @@ static int navi10_append_powerplay_table(struct smu_context *smu) 


static int navi10_store_powerplay_table(struct smu_context *smu)

{

	struct smu_11_0_powerplay_table *powerplay_table = NULL;

	struct smu_table_context *table_context = &smu->smu_table;

	struct smu_baco_context *smu_baco = &smu->smu_baco;



	if (!table_context->power_play_table)

		return -EINVAL;



	powerplay_table = table_context->power_play_table;

	struct smu_11_0_powerplay_table *powerplay_table =

		table_context->power_play_table;



	memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable,

	       sizeof(PPTable_t));



	table_context->thermal_controller_type = powerplay_table->thermal_controller_type;

	return 0;

}



	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC)

		smu->dc_controlled_by_gpio = true;

static int navi10_setup_pptable(struct smu_context *smu)

{

	int ret = 0;



	mutex_lock(&smu_baco->mutex);

	if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||

	    powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)

		smu_baco->platform_support = true;

	mutex_unlock(&smu_baco->mutex);

	ret = smu_v11_0_setup_pptable(smu);

	if (ret)

		return ret;



	return 0;

	ret = navi10_store_powerplay_table(smu);

	if (ret)

		return ret;



	ret = navi10_append_powerplay_table(smu);

	if (ret)

		return ret;



	ret = navi10_check_powerplay_table(smu);

	if (ret)

		return ret;



	return ret;

}



static int navi10_tables_init(struct smu_context *smu, struct smu_table *tables)
@@ -1927,24 +1957,6 @@ static int navi10_overdrive_get_gfx_clk_base_voltage(struct smu_context *smu, 
	return 0;

}



static int navi10_setup_od_limits(struct smu_context *smu) {

	struct smu_11_0_overdrive_table *overdrive_table = NULL;

	struct smu_11_0_powerplay_table *powerplay_table = NULL;



	if (!smu->smu_table.power_play_table) {

		pr_err("powerplay table uninitialized!\n");

		return -ENOENT;

	}

	powerplay_table = (struct smu_11_0_powerplay_table *)smu->smu_table.power_play_table;

	overdrive_table = &powerplay_table->overdrive_table;

	if (!smu->od_settings) {

		smu->od_settings = kmemdup(overdrive_table, sizeof(struct smu_11_0_overdrive_table), GFP_KERNEL);

	} else {

		memcpy(smu->od_settings, overdrive_table, sizeof(struct smu_11_0_overdrive_table));

	}

	return 0;

}



static bool navi10_is_baco_supported(struct smu_context *smu)

{

	struct amdgpu_device *adev = smu->adev;
@@ -1968,11 +1980,6 @@ static int navi10_set_default_od_settings(struct smu_context *smu, bool initiali 
	od_table = (OverDriveTable_t *)smu->smu_table.overdrive_table;

	boot_od_table = (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;

	if (initialize) {

		ret = navi10_setup_od_limits(smu);

		if (ret) {

			pr_err("Failed to retrieve board OD limits\n");

			return ret;

		}

		if (od_table) {

			if (!od_table->GfxclkVolt1) {

				ret = navi10_overdrive_get_gfx_clk_base_voltage(smu,
@@ -2273,9 +2280,6 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu) 
static const struct pptable_funcs navi10_ppt_funcs = {

	.tables_init = navi10_tables_init,

	.alloc_dpm_context = navi10_allocate_dpm_context,

	.store_powerplay_table = navi10_store_powerplay_table,

	.check_powerplay_table = navi10_check_powerplay_table,

	.append_powerplay_table = navi10_append_powerplay_table,

	.get_smu_msg_index = navi10_get_smu_msg_index,

	.get_smu_clk_index = navi10_get_smu_clk_index,

	.get_smu_feature_index = navi10_get_smu_feature_index,
@@ -2317,10 +2321,8 @@ static const struct pptable_funcs navi10_ppt_funcs = { 
	.init_power = smu_v11_0_init_power,

	.fini_power = smu_v11_0_fini_power,

	.check_fw_status = smu_v11_0_check_fw_status,

	.setup_pptable = smu_v11_0_setup_pptable,

	.setup_pptable = navi10_setup_pptable,

	.get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,

	.check_pptable = smu_v11_0_check_pptable,

	.parse_pptable = smu_v11_0_parse_pptable,

	.populate_smc_tables = smu_v11_0_populate_smc_pptable,

	.check_fw_version = smu_v11_0_check_fw_version,

	.write_pptable = smu_v11_0_write_pptable,

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