Commit 49ec508e authored by James Hogan's avatar James Hogan
Browse files

KVM: MIPS/TLB: Drop kvm_local_flush_tlb_all() 



Now that KVM no longer uses wired entries we can safely use
local_flush_tlb_all() when we need to flush the entire TLB (on the start
of a new ASID cycle). This doesn't flush wired entries, which allows
other code to use them without KVM clobbering them all the time. It also
is more up to date, knowing about the tlbinv architectural feature,
flushing of micro TLB on cores where that is necessary (Loongson I
believe), and knows to stop the HTW while doing so.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
parent 8af0e3c2

arch/mips/include/asm/kvm_host.h

+0 −1
Original line number Diff line number Diff line
@@ -641,7 +641,6 @@ void kvm_trap_emul_invalidate_gva(struct kvm_vcpu *vcpu, unsigned long addr, 
				  bool user);

extern void kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu,

				    struct kvm_vcpu *vcpu);

extern void kvm_local_flush_tlb_all(void);

extern void kvm_mips_alloc_new_mmu_context(struct kvm_vcpu *vcpu);

extern void kvm_mips_vcpu_load(struct kvm_vcpu *vcpu, int cpu);

extern void kvm_mips_vcpu_put(struct kvm_vcpu *vcpu);

arch/mips/include/asm/mmu_context.h

+0 −5
Original line number Diff line number Diff line
@@ -99,17 +99,12 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 
static inline void

get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)

{

	extern void kvm_local_flush_tlb_all(void);

	unsigned long asid = asid_cache(cpu);



	if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) {

		if (cpu_has_vtag_icache)

			flush_icache_all();

#ifdef CONFIG_KVM

		kvm_local_flush_tlb_all();      /* start new asid cycle */

#else

		local_flush_tlb_all();	/* start new asid cycle */

#endif

		if (!asid)		/* fix version if needed */

			asid = asid_first_version(cpu);

	}

arch/mips/kvm/mmu.c

+1 −1
Original line number Diff line number Diff line
@@ -453,7 +453,7 @@ void kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu, 
		if (cpu_has_vtag_icache)

			flush_icache_all();



		kvm_local_flush_tlb_all();      /* start new asid cycle */

		local_flush_tlb_all();      /* start new asid cycle */



		if (!asid)      /* fix version if needed */

			asid = asid_first_version(cpu);

arch/mips/kvm/tlb.c

+0 −29
Original line number Diff line number Diff line
@@ -263,35 +263,6 @@ void kvm_mips_flush_host_tlb(int skip_kseg0) 
}

EXPORT_SYMBOL_GPL(kvm_mips_flush_host_tlb);



void kvm_local_flush_tlb_all(void)

{

	unsigned long flags;

	unsigned long old_ctx;

	int entry = 0;



	local_irq_save(flags);

	/* Save old context and create impossible VPN2 value */

	old_ctx = read_c0_entryhi();

	write_c0_entrylo0(0);

	write_c0_entrylo1(0);



	/* Blast 'em all away. */

	while (entry < current_cpu_data.tlbsize) {

		/* Make sure all entries differ. */

		write_c0_entryhi(UNIQUE_ENTRYHI(entry));

		write_c0_index(entry);

		mtc0_tlbw_hazard();

		tlb_write_indexed();

		tlbw_use_hazard();

		entry++;

	}

	write_c0_entryhi(old_ctx);

	mtc0_tlbw_hazard();



	local_irq_restore(flags);

}

EXPORT_SYMBOL_GPL(kvm_local_flush_tlb_all);



/**

 * kvm_mips_suspend_mm() - Suspend the active mm.

 * @cpu		The CPU we're running on.

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