Unverified Commit 49d7d695 authored Oct 08, 2020 by Serge Semin Committed by Mark Brown Oct 08, 2020

spi: dw: Explicitly de-assert CS on SPI transfer completion

By design of the currently available native set_cs callback, the CS
de-assertion will be done only if it's required by the corresponding
controller capability. But in order to pre-fill the Tx FIFO buffer with
data during the SPI memory ops execution the SER register needs to be left
cleared before that. We'll also need a way to explicitly set and clear the
corresponding CS bit at a certain moment of the operation. Let's alter
the set_cs function then to also de-activate the CS, when it's required.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20201007235511.4935-15-Sergey.Semin@baikalelectronics.ru

Signed-off-by: Mark Brown <broonie@kernel.org>

parent fbddc989

drivers/spi/spi-dw-core.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -100,7 +100,7 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable)
		*/
		if (cs_high == enable)
		dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select));
		else if (dws->caps & DW_SPI_CAP_CS_OVERRIDE)
		else
		dw_writel(dws, DW_SPI_SER, 0);
		}
		EXPORT_SYMBOL_GPL(dw_spi_set_cs);

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