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GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in the range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins between GP3_17 to GP3_26 are unused. Add support for handling unused GPIO's. Signed-off-by:Biju Das <biju.das@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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