Commit 493d2dfa authored by Stanislaw Gruszka's avatar Stanislaw Gruszka Committed by Felix Fietkau
Browse files

mt76x02: fixup MT_PROT_RATE_* defines 



On new mt76 chips, phy mode is configured by last 3 bits
of rate value. Hence OFDM bit is marked by 0x2000
instead of 0x4000.

Acked-by: default avatarLorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 20ce270e

drivers/net/wireless/mediatek/mt76/mt76x02_regs.h

+3 −3
Original line number Diff line number Diff line
@@ -440,9 +440,9 @@ 
#define MT_PROT_TXOP_ALLOW_GF40		BIT(25)

#define MT_PROT_RTS_THR_EN		BIT(26)

#define MT_PROT_RATE_CCK_11		0x0003

#define MT_PROT_RATE_OFDM_6		0x4000

#define MT_PROT_RATE_OFDM_24		0x4004

#define MT_PROT_RATE_DUP_OFDM_24	0x4084

#define MT_PROT_RATE_OFDM_6		0x2000

#define MT_PROT_RATE_OFDM_24		0x2004

#define MT_PROT_RATE_DUP_OFDM_24	0x2084

#define MT_PROT_TXOP_ALLOW_ALL		GENMASK(25, 20)

#define MT_PROT_TXOP_ALLOW_BW20		(MT_PROT_TXOP_ALLOW_ALL &	\

					 ~MT_PROT_TXOP_ALLOW_MM40 &	\

CRA Git | Maintained and supported by SUSTech CRA and CCSE