Commit 4906ce45 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'dsa-mv88e6xxx-probe-compatible' 

Vivien Didelot says:

====================
net: dsa: mv88e6xxx: probe compatible

This patchset factorizes the legacy and new SMI probing and abstracts
the switch register accesses. This simplifies adding support for new
chips or alternative register accesses.

This will allow us to use a compatible chip info to describe how to
access the SMI device and its switch ID register at probe time.

For the legacy probe, we fix the compatible info to 88E6085. For the
MDIO probe, we will use the compatible info from the device node data.

All patches are reviewed.

Changes since v4:

  - fix debug printing (was 'val' instead of '*val')

Changes since v3 [3]:

  - better register access abstraction using the chip structure

Changes since v2 [2]:

  - do not guess compatible model in legacy probe
  - add low level SMI API using a chip structure
  - allocate before probe and detection
  - add 3 cosmetic patches

Changes since v1 [1]:

  - merge style fix from Ben Dooks
  - add Acked-by/Reviewed-by tags
  - drop one compatible string per model
  - detect the SMI device based on the compatible info
  - add an SMI ops structure

[1] https://lkml.org/lkml/2016/6/8/1201
[2] https://lkml.org/lkml/2016/6/14/671
[3] https://lkml.org/lkml/2016/6/17/995


====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 697666ea 914b32f6

drivers/net/dsa/mv88e6xxx.c

+357 −210

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/dsa/mv88e6xxx.h

+28 −6
Original line number Diff line number Diff line
@@ -387,6 +387,12 @@ enum mv88e6xxx_cap { 
	 */

	MV88E6XXX_CAP_EEPROM,



	/* Multi-chip Addressing Mode.

	 * Some chips require an indirect SMI access when their SMI device

	 * address is not zero. See SMI_CMD and SMI_DATA.

	 */

	MV88E6XXX_CAP_MULTI_CHIP,



	/* Port State Filtering for 802.1D Spanning Tree.

	 * See PORT_CONTROL_STATE_* values in the PORT_CONTROL register.

	 */
@@ -439,6 +445,7 @@ enum mv88e6xxx_cap { 
#define MV88E6XXX_FLAG_ATU		BIT(MV88E6XXX_CAP_ATU)

#define MV88E6XXX_FLAG_EEE		BIT(MV88E6XXX_CAP_EEE)

#define MV88E6XXX_FLAG_EEPROM		BIT(MV88E6XXX_CAP_EEPROM)

#define MV88E6XXX_FLAG_MULTI_CHIP	BIT(MV88E6XXX_CAP_MULTI_CHIP)

#define MV88E6XXX_FLAG_PORTSTATE	BIT(MV88E6XXX_CAP_PORTSTATE)

#define MV88E6XXX_FLAG_PPU		BIT(MV88E6XXX_CAP_PPU)

#define MV88E6XXX_FLAG_PPU_ACTIVE	BIT(MV88E6XXX_CAP_PPU_ACTIVE)
@@ -452,25 +459,29 @@ enum mv88e6xxx_cap { 


#define MV88E6XXX_FLAGS_FAMILY_6095	\

	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PPU |		\

	 MV88E6XXX_FLAG_VLANTABLE |	\

	 MV88E6XXX_FLAG_VTU)



#define MV88E6XXX_FLAGS_FAMILY_6097	\

	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PPU |		\

	 MV88E6XXX_FLAG_STU |		\

	 MV88E6XXX_FLAG_VLANTABLE |	\

	 MV88E6XXX_FLAG_VTU)



#define MV88E6XXX_FLAGS_FAMILY_6165	\

	(MV88E6XXX_FLAG_STU |		\

	(MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_STU |		\

	 MV88E6XXX_FLAG_SWITCH_MAC |	\

	 MV88E6XXX_FLAG_TEMP |		\

	 MV88E6XXX_FLAG_VTU)



#define MV88E6XXX_FLAGS_FAMILY_6185	\

	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PPU |		\

	 MV88E6XXX_FLAG_VLANTABLE |	\

	 MV88E6XXX_FLAG_VTU)
@@ -479,6 +490,7 @@ enum mv88e6xxx_cap { 
	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_EEE |		\

	 MV88E6XXX_FLAG_EEPROM |	\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PORTSTATE |	\

	 MV88E6XXX_FLAG_PPU_ACTIVE |	\

	 MV88E6XXX_FLAG_SMI_PHY |	\
@@ -490,6 +502,7 @@ enum mv88e6xxx_cap { 


#define MV88E6XXX_FLAGS_FAMILY_6351	\

	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PORTSTATE |	\

	 MV88E6XXX_FLAG_PPU_ACTIVE |	\

	 MV88E6XXX_FLAG_SMI_PHY |	\
@@ -503,6 +516,7 @@ enum mv88e6xxx_cap { 
	(MV88E6XXX_FLAG_ATU |		\

	 MV88E6XXX_FLAG_EEE |		\

	 MV88E6XXX_FLAG_EEPROM |	\

	 MV88E6XXX_FLAG_MULTI_CHIP |	\

	 MV88E6XXX_FLAG_PORTSTATE |	\

	 MV88E6XXX_FLAG_PPU_ACTIVE |	\

	 MV88E6XXX_FLAG_SMI_PHY |	\
@@ -519,6 +533,7 @@ struct mv88e6xxx_info { 
	const char *name;

	unsigned int num_databases;

	unsigned int num_ports;

	unsigned int port_base_addr;

	unsigned long flags;

};
@@ -541,6 +556,8 @@ struct mv88e6xxx_vtu_stu_entry { 
	u8	data[DSA_MAX_PORTS];

};



struct mv88e6xxx_ops;



struct mv88e6xxx_priv_port {

	struct net_device *bridge_dev;

};
@@ -554,15 +571,13 @@ struct mv88e6xxx_priv_state { 
	/* The device this structure is associated to */

	struct device *dev;



	/* When using multi-chip addressing, this mutex protects

	 * access to the indirect access registers.  (In single-chip

	 * mode, this mutex is effectively useless.)

	 */

	struct mutex	smi_mutex;

	/* This mutex protects the access to the switch registers */

	struct mutex reg_lock;



	/* The MII bus and the address on the bus that is used to

	 * communication with the switch

	 */

	const struct mv88e6xxx_ops *smi_ops;

	struct mii_bus *bus;

	int sw_addr;
@@ -608,6 +623,13 @@ struct mv88e6xxx_priv_state { 
	struct mii_bus *mdio_bus;

};



struct mv88e6xxx_ops {

	int (*read)(struct mv88e6xxx_priv_state *ps,

		    int addr, int reg, u16 *val);

	int (*write)(struct mv88e6xxx_priv_state *ps,

		     int addr, int reg, u16 val);

};



enum stat_type {

	BANK0,

	BANK1,

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