Commit 48ae397b authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Push the ring creation flags to the backend



Push the ring creation flags from the outer GEM context to the inner
intel_context to avoid an unsightly back-reference from inside the
backend.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190809182518.20486-3-chris@chris-wilson.co.uk
parent 4c60b1aa
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+26 −14
Original line number Diff line number Diff line
@@ -436,8 +436,6 @@ __create_context(struct drm_i915_private *i915)
	i915_gem_context_set_bannable(ctx);
	i915_gem_context_set_recoverable(ctx);

	ctx->ring_size = 4 * PAGE_SIZE;

	for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
		ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;

@@ -448,22 +446,34 @@ err_free:
	return ERR_PTR(err);
}

static struct i915_address_space *
__set_ppgtt(struct i915_gem_context *ctx, struct i915_address_space *vm)
static void
context_apply_all(struct i915_gem_context *ctx,
		  void (*fn)(struct intel_context *ce, void *data),
		  void *data)
{
	struct i915_address_space *old = ctx->vm;
	struct i915_gem_engines_iter it;
	struct intel_context *ce;

	GEM_BUG_ON(old && i915_vm_is_4lvl(vm) != i915_vm_is_4lvl(old));

	ctx->vm = i915_vm_get(vm);
	for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it)
		fn(ce, data);
	i915_gem_context_unlock_engines(ctx);
}

	for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
static void __apply_ppgtt(struct intel_context *ce, void *vm)
{
	i915_vm_put(ce->vm);
	ce->vm = i915_vm_get(vm);
}
	i915_gem_context_unlock_engines(ctx);

static struct i915_address_space *
__set_ppgtt(struct i915_gem_context *ctx, struct i915_address_space *vm)
{
	struct i915_address_space *old = ctx->vm;

	GEM_BUG_ON(old && i915_vm_is_4lvl(vm) != i915_vm_is_4lvl(old));

	ctx->vm = i915_vm_get(vm);
	context_apply_all(ctx, __apply_ppgtt, vm);

	return old;
}
@@ -560,7 +570,6 @@ i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)

	i915_gem_context_clear_bannable(ctx);
	ctx->sched.priority = I915_USER_PRIORITY(prio);
	ctx->ring_size = PAGE_SIZE;

	GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));

@@ -1544,6 +1553,7 @@ set_engines(struct i915_gem_context *ctx,
	for (n = 0; n < num_engines; n++) {
		struct i915_engine_class_instance ci;
		struct intel_engine_cs *engine;
		struct intel_context *ce;

		if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
			__free_engines(set.engines, n);
@@ -1566,11 +1576,13 @@ set_engines(struct i915_gem_context *ctx,
			return -ENOENT;
		}

		set.engines->engines[n] = intel_context_create(ctx, engine);
		if (!set.engines->engines[n]) {
		ce = intel_context_create(ctx, engine);
		if (IS_ERR(ce)) {
			__free_engines(set.engines, n);
			return -ENOMEM;
			return PTR_ERR(ce);
		}

		set.engines->engines[n] = ce;
	}
	set.engines->num_engines = num_engines;

+0 −3
Original line number Diff line number Diff line
@@ -169,9 +169,6 @@ struct i915_gem_context {

	struct i915_sched_attr sched;

	/** ring_size: size for allocating the per-engine ring buffer */
	u32 ring_size;

	/** guilty_count: How many times this context has caused a GPU hang. */
	atomic_t guilty_count;
	/**
+1 −0
Original line number Diff line number Diff line
@@ -222,6 +222,7 @@ intel_context_init(struct intel_context *ce,
	ce->engine = engine;
	ce->ops = engine->cops;
	ce->sseu = engine->sseu;
	ce->ring = __intel_context_ring_size(SZ_16K);

	INIT_LIST_HEAD(&ce->signal_link);
	INIT_LIST_HEAD(&ce->signals);
+5 −0
Original line number Diff line number Diff line
@@ -136,4 +136,9 @@ int intel_context_prepare_remote_request(struct intel_context *ce,

struct i915_request *intel_context_create_request(struct intel_context *ce);

static inline struct intel_ring *__intel_context_ring_size(u64 sz)
{
	return u64_to_ptr(struct intel_ring, sz);
}

#endif /* __INTEL_CONTEXT_H__ */
+2 −0
Original line number Diff line number Diff line
@@ -738,6 +738,8 @@ create_kernel_context(struct intel_engine_cs *engine)
	if (IS_ERR(ce))
		return ce;

	ce->ring = __intel_context_ring_size(SZ_4K);

	err = intel_context_pin(ce);
	if (err) {
		intel_context_put(ce);
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