Commit 48aa820f authored by Rob Herring's avatar Rob Herring Committed by Marek Szyprowski
Browse files

ARM: kill off arch_is_coherent 



With ixp2xxx removed, there are no platforms that define arch_is_coherent,
so the last occurrences of arch_is_coherent can be removed. Any new
platform with coherent i/o should use coherent dma mapping functions.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
parent 0fa478df

arch/arm/include/asm/barrier.h

+3 −4
Original line number Diff line number Diff line
@@ -44,10 +44,9 @@ 
#define rmb()		dsb()

#define wmb()		mb()

#else

#include <asm/memory.h>

#define mb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)

#define rmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)

#define wmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)

#define mb()		barrier()

#define rmb()		barrier()

#define wmb()		barrier()

#endif



#ifndef CONFIG_SMP

arch/arm/include/asm/memory.h

+0 −8
Original line number Diff line number Diff line
@@ -275,14 +275,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x) 
#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)

#define virt_addr_valid(kaddr)	((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)



/*

 * Optional coherency support.  Currently used only by selected

 * Intel XSC3-based systems.

 */

#ifndef arch_is_coherent

#define arch_is_coherent()		0

#endif



#endif



#include <asm-generic/memory_model.h>

arch/arm/mm/mmu.c

+3 −14
Original line number Diff line number Diff line
@@ -421,17 +421,6 @@ static void __init build_mem_type_table(void) 
	cp = &cache_policies[cachepolicy];

	vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;



	/*

	 * Enable CPU-specific coherency if supported.

	 * (Only available on XSC3 at the moment.)

	 */

	if (arch_is_coherent() && cpu_is_xsc3()) {

		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;

		mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;

		mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;

		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;

		mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;

	}

	/*

	 * ARMv6 and above have extended page tables.

	 */

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