Commit 4866d729 authored by John Harrison's avatar John Harrison Committed by Daniel Vetter
Browse files

drm/i915: Update flush_all_caches() to take request structures 



Updated the *_ring_flush_all_caches() functions to take requests instead of
rings or ringbuf/context pairs.

For: VIZ-5115
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Reviewed-by: default avatarTomas Elf <tomas.elf@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e2be4faf

drivers/gpu/drm/i915/i915_gem.c

+2 −2
Original line number Diff line number Diff line
@@ -2507,9 +2507,9 @@ void __i915_add_request(struct drm_i915_gem_request *request, 
	 */

	if (flush_caches) {

		if (i915.enable_execlists)

			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);

			ret = logical_ring_flush_all_caches(request);

		else

			ret = intel_ring_flush_all_caches(ring);

			ret = intel_ring_flush_all_caches(request);

		/* Not allowed to fail! */

		WARN(ret, "*_ring_flush_all_caches failed: %d!\n", ret);

	}

drivers/gpu/drm/i915/intel_lrc.c

+5 −6
Original line number Diff line number Diff line
@@ -997,16 +997,15 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring) 
	I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));

}



int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,

				  struct intel_context *ctx)

int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)

{

	struct intel_engine_cs *ring = ringbuf->ring;

	struct intel_engine_cs *ring = req->ring;

	int ret;



	if (!ring->gpu_caches_dirty)

		return 0;



	ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);

	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);

	if (ret)

		return ret;
@@ -1071,7 +1070,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req) 
		return 0;



	ring->gpu_caches_dirty = true;

	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);

	ret = logical_ring_flush_all_caches(req);

	if (ret)

		return ret;
@@ -1089,7 +1088,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req) 
	intel_logical_ring_advance(ringbuf);



	ring->gpu_caches_dirty = true;

	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);

	ret = logical_ring_flush_all_caches(req);

	if (ret)

		return ret;

drivers/gpu/drm/i915/intel_lrc.h

+1 −2
Original line number Diff line number Diff line
@@ -41,8 +41,7 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring); 
void intel_logical_ring_cleanup(struct intel_engine_cs *ring);

int intel_logical_rings_init(struct drm_device *dev);



int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,

				  struct intel_context *ctx);

int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);

/**

 * intel_logical_ring_advance() - advance the ringbuffer tail

 * @ringbuf: Ringbuffer to advance.

drivers/gpu/drm/i915/intel_ringbuffer.c

+4 −3
Original line number Diff line number Diff line
@@ -715,7 +715,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) 
		return 0;



	ring->gpu_caches_dirty = true;

	ret = intel_ring_flush_all_caches(ring);

	ret = intel_ring_flush_all_caches(req);

	if (ret)

		return ret;
@@ -733,7 +733,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) 
	intel_ring_advance(ring);



	ring->gpu_caches_dirty = true;

	ret = intel_ring_flush_all_caches(ring);

	ret = intel_ring_flush_all_caches(req);

	if (ret)

		return ret;
@@ -2892,8 +2892,9 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) 
}



int

intel_ring_flush_all_caches(struct intel_engine_cs *ring)

intel_ring_flush_all_caches(struct drm_i915_gem_request *req)

{

	struct intel_engine_cs *ring = req->ring;

	int ret;



	if (!ring->gpu_caches_dirty)

drivers/gpu/drm/i915/intel_ringbuffer.h

+1 −1
Original line number Diff line number Diff line
@@ -445,7 +445,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring); 


int __must_check intel_ring_idle(struct intel_engine_cs *ring);

void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);

int intel_ring_flush_all_caches(struct intel_engine_cs *ring);

int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);

int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);



void intel_fini_pipe_control(struct intel_engine_cs *ring);

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