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It seems both PCLK_I2S1 and SCLK_I2S1 clocks need to be enabled before I2S1 control registers can be accessed on exynos5433. If SCLK clock is disabled an exception is triggered. To fix this parent clock of the RCLK_SRC clock is assigned to pri_dai->op_clk so required gate clock is handled by the runtime PM ops. Signed-off-by:Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
Mark Brown <broonie@kernel.org>
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