Commit 4821ff14 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2013-09-21-merged' of... 

Merge tag 'drm-intel-next-2013-09-21-merged' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

drm-intel-next-2013-09-21:
- clock state handling rework from Ville
- l3 parity handling fixes for hsw from Ben
- some more watermark improvements from Ville
- ban badly behaved context from Mika
- a few vlv improvements from Jesse
- VGA power domain handling from Ville
drm-intel-next-2013-09-06:
- Basic mipi dsi support from Jani. Not yet converted over to drm_bridge
  since that was too fresh, but the porting is in progress already.
- More vma patches from Ben, this time the code to convert the execbuffer
  code. Now that the shrinker recursion bug is tracked down we can move
  ahead here again. Yay!
- Optimize hw context switching to not generate needless interrupts (Chris
  Wilson). Also some shuffling for the oustanding request allocation.
- Opregion support for SWSCI, although not yet fully wired up (we need a
  bit of runtime D3 support for that apparently, due to Windows design
  deficiencies), from Jani Nikula.
- A few smaller changes all over.

[airlied: merge conflict fix in i9xx_set_pipeconf]

* tag 'drm-intel-next-2013-09-21-merged' of git://people.freedesktop.org/~danvet/drm-intel: (119 commits)
  drm/i915: assume all GM45 Acer laptops use inverted backlight PWM
  drm/i915: cleanup a min_t() cast
  drm/i915: Pull intel_init_power_well() out of intel_modeset_init_hw()
  drm/i915: Add POWER_DOMAIN_VGA
  drm/i915: Refactor power well refcount inc/dec operations
  drm/i915: Add intel_display_power_{get, put} to request power for specific domains
  drm/i915: Change i915_request power well handling
  drm/i915: POSTING_READ IPS_CTL before waiting for the vblank
  drm/i915: don't disable ERR_INT on the IRQ handler
  drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYT
  drm/i915/vlv: honor i915_enable_rc6 boot param on VLV
  drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF
  drm/i915: Do remaps for all contexts
  drm/i915: Keep a list of all contexts
  drm/i915: Make l3 remapping use the ring
  drm/i915: Add second slice l3 remapping
  drm/i915: Fix HSW parity test
  drm/i915: dump crtc timings from the pipe config
  drm/i915: register backlight device also when backlight class is a module
  drm/i915: write D_COMP using the mailbox
  ...

Conflicts:
	drivers/gpu/drm/i915/intel_display.c
parents 15c03dd4 b599c89e

drivers/gpu/drm/drm_crtc.c

+2 −0
Original line number Diff line number Diff line
@@ -202,6 +202,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] = 
	{ DRM_MODE_CONNECTOR_TV, "TV" },

	{ DRM_MODE_CONNECTOR_eDP, "eDP" },

	{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },

	{ DRM_MODE_CONNECTOR_DSI, "DSI" },

};



static const struct drm_prop_enum_list drm_encoder_enum_list[] =
@@ -211,6 +212,7 @@ static const struct drm_prop_enum_list drm_encoder_enum_list[] = 
	{ DRM_MODE_ENCODER_LVDS, "LVDS" },

	{ DRM_MODE_ENCODER_TVDAC, "TV" },

	{ DRM_MODE_ENCODER_VIRTUAL, "Virtual" },

	{ DRM_MODE_ENCODER_DSI, "DSI" },

};



void drm_connector_ida_init(void)

drivers/gpu/drm/i915/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,9 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \ 
	  intel_display.o \

	  intel_crt.o \

	  intel_lvds.o \

	  intel_dsi.o \

	  intel_dsi_cmd.o \

	  intel_dsi_pll.o \

	  intel_bios.o \

	  intel_ddi.o \

	  intel_dp.o \

drivers/gpu/drm/i915/dvo.h

+0 −11
Original line number Diff line number Diff line
@@ -76,17 +76,6 @@ struct intel_dvo_dev_ops { 
	int (*mode_valid)(struct intel_dvo_device *dvo,

			  struct drm_display_mode *mode);



	/*

	 * Callback to adjust the mode to be set in the CRTC.

	 *

	 * This allows an output to adjust the clock or even the entire set of

	 * timings, which is used for panels with fixed timings or for

	 * buses with clock limitations.

	 */

	bool (*mode_fixup)(struct intel_dvo_device *dvo,

			   const struct drm_display_mode *mode,

			   struct drm_display_mode *adjusted_mode);



	/*

	 * Callback for preparing mode changes on an output

	 */

drivers/gpu/drm/i915/i915_debugfs.c

+26 −15
Original line number Diff line number Diff line
@@ -145,6 +145,13 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) 
		seq_printf(m, " (%s)", obj->ring->name);

}



static void describe_ctx(struct seq_file *m, struct i915_hw_context *ctx)

{

	seq_putc(m, ctx->is_initialized ? 'I' : 'i');

	seq_putc(m, ctx->remap_slice ? 'R' : 'r');

	seq_putc(m, ' ');

}



static int i915_gem_object_list_info(struct seq_file *m, void *data)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;
@@ -1442,6 +1449,7 @@ static int i915_context_status(struct seq_file *m, void *unused) 
	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	struct intel_ring_buffer *ring;

	struct i915_hw_context *ctx;

	int ret, i;



	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
@@ -1460,13 +1468,16 @@ static int i915_context_status(struct seq_file *m, void *unused) 
		seq_putc(m, '\n');

	}



	for_each_ring(ring, dev_priv, i) {

		if (ring->default_context) {

			seq_printf(m, "HW default context %s ring ", ring->name);

			describe_obj(m, ring->default_context->obj);

	list_for_each_entry(ctx, &dev_priv->context_list, link) {

		seq_puts(m, "HW context ");

		describe_ctx(m, ctx);

		for_each_ring(ring, dev_priv, i)

			if (ring->default_context == ctx)

				seq_printf(m, "(default context %s) ", ring->name);



		describe_obj(m, ctx->obj);

		seq_putc(m, '\n');

	}

	}



	mutex_unlock(&dev->mode_config.mutex);
@@ -1610,27 +1621,27 @@ static int i915_dpio_info(struct seq_file *m, void *data) 
	seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));



	seq_printf(m, "DPIO_DIV_A: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_DIV_A));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_DIV_A));

	seq_printf(m, "DPIO_DIV_B: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_DIV_B));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_DIV_B));



	seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_REFSFR_A));

	seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_REFSFR_B));



	seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_CORE_CLK_A));

	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_CORE_CLK_B));



	seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_LPF_COEFF_A));

	seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",

		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));

		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_LPF_COEFF_B));



	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",

		   vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));

		   vlv_dpio_read(dev_priv, PIPE_A, DPIO_FASTCLK_DISABLE));



	mutex_unlock(&dev_priv->dpio_lock);

drivers/gpu/drm/i915/i915_dma.c

+3 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ 
	intel_ring_emit(LP_RING(dev_priv), x)



#define ADVANCE_LP_RING() \

	intel_ring_advance(LP_RING(dev_priv))

	__intel_ring_advance(LP_RING(dev_priv))



/**

 * Lock test for when it's just for synchronization of ring access.
@@ -1324,6 +1324,8 @@ static int i915_load_modeset_init(struct drm_device *dev) 


	INIT_WORK(&dev_priv->console_resume_work, intel_console_resume);



	intel_init_power_well(dev);



	intel_modeset_gem_init(dev);



	/* Always safe in the mode setting case. */

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