Unverified Commit 48084c35 authored by Kefeng Wang's avatar Kefeng Wang Committed by Palmer Dabbelt
Browse files

riscv: perf: RISCV_BASE_PMU should be independent 



Selecting PERF_EVENTS without selecting RISCV_BASE_PMU results in a build
error.

Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
[Palmer: commit text]
Fixes: 178e9fc4("perf: riscv: preliminary RISC-V support")
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent e7b146a8

arch/riscv/include/asm/perf_event.h

+2 −6
Original line number Diff line number Diff line
@@ -12,19 +12,14 @@ 
#include <linux/ptrace.h>

#include <linux/interrupt.h>



#ifdef CONFIG_RISCV_BASE_PMU

#define RISCV_BASE_COUNTERS	2



/*

 * The RISCV_MAX_COUNTERS parameter should be specified.

 */



#ifdef CONFIG_RISCV_BASE_PMU

#define RISCV_MAX_COUNTERS	2

#endif



#ifndef RISCV_MAX_COUNTERS

#error "Please provide a valid RISCV_MAX_COUNTERS for the PMU."

#endif



/*

 * These are the indexes of bits in counteren register *minus* 1,
@@ -82,6 +77,7 @@ struct riscv_pmu { 
	int		irq;

};



#endif

#ifdef CONFIG_PERF_EVENTS

#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs

#endif

arch/riscv/kernel/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o 
obj-$(CONFIG_FUNCTION_TRACER)	+= mcount.o ftrace.o

obj-$(CONFIG_DYNAMIC_FTRACE)	+= mcount-dyn.o



obj-$(CONFIG_PERF_EVENTS)	+= perf_event.o

obj-$(CONFIG_RISCV_BASE_PMU)	+= perf_event.o

obj-$(CONFIG_PERF_EVENTS)	+= perf_callchain.o

obj-$(CONFIG_HAVE_PERF_REGS)	+= perf_regs.o

obj-$(CONFIG_RISCV_SBI)		+= sbi.o

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