Commit 47ce8af4 authored Oct 11, 2013 by Scott Wood

powerpc: add barrier after writing kernel PTE



There is no barrier between something like ioremap() writing to
a PTE, and returning the value to a caller that may then store the
pointer in a place that is visible to other CPUs.  Such callers
generally don't perform barriers of their own.

Even if callers of ioremap() and similar things did use barriers,
the most logical choise would be smp_wmb(), which is not
architecturally sufficient when BookE hardware tablewalk is used.  A
full sync is specified by the architecture.

For userspace mappings, OTOH, we generally already have an lwsync due
to locking, and if we occasionally take a spurious fault due to not
having a full sync with hardware tablewalk, it will not be fatal
because we will retry rather than oops.

Signed-off-by: Scott Wood <scottwood@freescale.com>

parent dde7dd3d

arch/powerpc/mm/pgtable_32.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -299,6 +299,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
		set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT,
		__pgprot(flags)));
		}
		smp_wmb();
		return err;
		}

arch/powerpc/mm/pgtable_64.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -153,6 +153,18 @@ int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
		}
		#endif /* !CONFIG_PPC_MMU_NOHASH */
		}

		#ifdef CONFIG_PPC_BOOK3E_64
		/*
		* With hardware tablewalk, a sync is needed to ensure that
		* subsequent accesses see the PTE we just wrote. Unlike userspace
		* mappings, we can't tolerate spurious faults, so make sure
		* the new PTE will be seen the first time.
		*/
		mb();
		#else
		smp_wmb();
		#endif
		return 0;
		}

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