Commit 478016c3 authored Nov 01, 2019 by Julien Grall Committed by Catalin Marinas Nov 01, 2019

docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]

Commit "docs/arm64: cpu-feature-registers: Documents missing visible
fields" added bitfields following the convention [s, e]. However, the
documentation is following [s, e] and so does the Arm ARM.

Rewrite the bitfields to match the format [s, e].

Fixes: a8613e70 ("docs/arm64: cpu-feature-registers: Documents missing visible fields")
Signed-off-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent a8613e70

Documentation/arm64/cpu-feature-registers.rst

+2 −2

Original line number	Diff line number	Diff line
		@@ -193,9 +193,9 @@ infrastructure:
		+------------------------------+---------+---------+
		\| Name \| bits \| visible \|
		+------------------------------+---------+---------+
		\| SB \| [36-39] \| y \|
		\| SB \| [39-36] \| y \|
		+------------------------------+---------+---------+
		\| FRINTTS \| [32-35] \| y \|
		\| FRINTTS \| [35-32] \| y \|
		+------------------------------+---------+---------+
		\| GPI \| [31-28] \| y \|
		+------------------------------+---------+---------+

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