Commit 46fe37b9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-queued-2020-11-27' of... 

Merge tag 'drm-intel-next-queued-2020-11-27' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

drm/i915 features for v5.11:

Highlights:
- Enable big joiner to join two pipes to one port to overcome pipe restrictions
  (Manasi, Ville, Maarten)

Display:
- More DG1 enabling (Lucas, Aditya)
- Fixes to cases without display (Lucas, José, Jani)
- Initial PSR state improvements (José)
- JSL eDP vswing updates (Tejas)
- Handle EDID declared max 16 bpc (Ville)
- Display refactoring (Ville)

Other:
- GVT features
- Backmerge

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87czzzkk1s.fsf@intel.com
parents 22f8c805 b3bf99da

drivers/gpu/drm/i915/display/icl_dsi.c

+2 −3
Original line number Diff line number Diff line
@@ -1492,11 +1492,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, 
	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);



	intel_dsc_get_config(encoder, pipe_config);



	/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */

	pipe_config->port_clock = intel_dpll_get_freq(i915,

						      pipe_config->shared_dpll);

						      pipe_config->shared_dpll,

						      &pipe_config->dpll_hw_state);



	pipe_config->hw.adjusted_mode.crtc_clock = intel_dsi->pclk;

	if (intel_dsi->dual_link)

drivers/gpu/drm/i915/display/intel_atomic.c

+5 −5
Original line number Diff line number Diff line
@@ -133,7 +133,6 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn, 
	struct drm_crtc_state *crtc_state;



	intel_hdcp_atomic_check(conn, old_state, new_state);

	intel_psr_atomic_check(conn, old_state, new_state);



	if (!new_state->crtc)

		return 0;
@@ -270,14 +269,15 @@ void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state) 
	intel_crtc_put_color_blobs(crtc_state);

}



void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state)

void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,

				 const struct intel_crtc_state *from_crtc_state)

{

	drm_property_replace_blob(&crtc_state->hw.degamma_lut,

				  crtc_state->uapi.degamma_lut);

				  from_crtc_state->uapi.degamma_lut);

	drm_property_replace_blob(&crtc_state->hw.gamma_lut,

				  crtc_state->uapi.gamma_lut);

				  from_crtc_state->uapi.gamma_lut);

	drm_property_replace_blob(&crtc_state->hw.ctm,

				  crtc_state->uapi.ctm);

				  from_crtc_state->uapi.ctm);

}



/**

drivers/gpu/drm/i915/display/intel_atomic.h

+2 −1
Original line number Diff line number Diff line
@@ -43,7 +43,8 @@ struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc); 
void intel_crtc_destroy_state(struct drm_crtc *crtc,

			       struct drm_crtc_state *state);

void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);

void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state);

void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state,

				 const struct intel_crtc_state *from_crtc_state);

struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);

void intel_atomic_state_free(struct drm_atomic_state *state);

void intel_atomic_state_clear(struct drm_atomic_state *state);

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+113 −18
Original line number Diff line number Diff line
@@ -247,11 +247,19 @@ static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state) 
}



void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,

				       const struct intel_plane_state *from_plane_state)

				       const struct intel_plane_state *from_plane_state,

				       struct intel_crtc *crtc)

{

	intel_plane_clear_hw_state(plane_state);



	plane_state->hw.crtc = from_plane_state->uapi.crtc;

	/*

	 * For the bigjoiner slave uapi.crtc will point at

	 * the master crtc. So we explicitly assign the right

	 * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates

	 * the plane is logically enabled on the uapi level.

	 */

	plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;



	plane_state->hw.fb = from_plane_state->uapi.fb;

	if (plane_state->hw.fb)

		drm_framebuffer_get(plane_state->hw.fb);
@@ -263,6 +271,21 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state, 
	plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;

	plane_state->hw.color_range = from_plane_state->uapi.color_range;

	plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;



	plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);

	plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);

}



void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,

			       const struct intel_plane_state *from_plane_state)

{

	intel_plane_clear_hw_state(plane_state);



	memcpy(&plane_state->hw, &from_plane_state->hw,

	       sizeof(plane_state->hw));



	if (plane_state->hw.fb)

		drm_framebuffer_get(plane_state->hw.fb);

}



void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
@@ -319,15 +342,16 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
					       old_plane_state, new_plane_state);

}



static struct intel_crtc *

get_crtc_from_states(const struct intel_plane_state *old_plane_state,

		     const struct intel_plane_state *new_plane_state)

static struct intel_plane *

intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)

{

	if (new_plane_state->uapi.crtc)

		return to_intel_crtc(new_plane_state->uapi.crtc);

	struct drm_i915_private *i915 = to_i915(crtc->base.dev);

	struct intel_plane *plane;



	if (old_plane_state->uapi.crtc)

		return to_intel_crtc(old_plane_state->uapi.crtc);

	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {

		if (plane->id == plane_id)

			return plane;

	}



	return NULL;

}
@@ -335,23 +359,37 @@ get_crtc_from_states(const struct intel_plane_state *old_plane_state, 
int intel_plane_atomic_check(struct intel_atomic_state *state,

			     struct intel_plane *plane)

{

	struct drm_i915_private *i915 = to_i915(state->base.dev);

	struct intel_plane_state *new_plane_state =

		intel_atomic_get_new_plane_state(state, plane);

	const struct intel_plane_state *old_plane_state =

		intel_atomic_get_old_plane_state(state, plane);

	struct intel_crtc *crtc =

		get_crtc_from_states(old_plane_state, new_plane_state);

	const struct intel_crtc_state *old_crtc_state;

	struct intel_crtc_state *new_crtc_state;

	const struct intel_plane_state *new_master_plane_state;

	struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, plane->pipe);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);

	struct intel_crtc_state *new_crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);



	if (new_crtc_state && new_crtc_state->bigjoiner_slave) {

		struct intel_plane *master_plane =

			intel_crtc_get_plane(new_crtc_state->bigjoiner_linked_crtc,

					     plane->id);



		new_master_plane_state =

			intel_atomic_get_new_plane_state(state, master_plane);

	} else {

		new_master_plane_state = new_plane_state;

	}



	intel_plane_copy_uapi_to_hw_state(new_plane_state,

					  new_master_plane_state,

					  crtc);



	intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);

	new_plane_state->uapi.visible = false;

	if (!crtc)

	if (!new_crtc_state)

		return 0;



	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

	new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);



	return intel_plane_atomic_check_with_state(old_crtc_state,

						   new_crtc_state,

						   old_plane_state,
@@ -479,6 +517,63 @@ void i9xx_update_planes_on_crtc(struct intel_atomic_state *state, 
	}

}



int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,

				      struct intel_crtc_state *crtc_state,

				      int min_scale, int max_scale,

				      bool can_position)

{

	struct drm_framebuffer *fb = plane_state->hw.fb;

	struct drm_rect *src = &plane_state->uapi.src;

	struct drm_rect *dst = &plane_state->uapi.dst;

	unsigned int rotation = plane_state->hw.rotation;

	struct drm_rect clip = {};

	int hscale, vscale;



	if (!fb) {

		plane_state->uapi.visible = false;

		return 0;

	}



	drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);



	/* Check scaling */

	hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);

	vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);

	if (hscale < 0 || vscale < 0) {

		DRM_DEBUG_KMS("Invalid scaling of plane\n");

		drm_rect_debug_print("src: ", src, true);

		drm_rect_debug_print("dst: ", dst, false);

		return -ERANGE;

	}



	if (crtc_state->hw.enable) {

		clip.x2 = crtc_state->pipe_src_w;

		clip.y2 = crtc_state->pipe_src_h;

	}



	/* right side of the image is on the slave crtc, adjust dst to match */

	if (crtc_state->bigjoiner_slave)

		drm_rect_translate(dst, -crtc_state->pipe_src_w, 0);



	/*

	 * FIXME: This might need further adjustment for seamless scaling

	 * with phase information, for the 2p2 and 2p1 scenarios.

	 */

	plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, &clip);



	drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);



	if (!can_position && plane_state->uapi.visible &&

	    !drm_rect_equals(dst, &clip)) {

		DRM_DEBUG_KMS("Plane must cover entire CRTC\n");

		drm_rect_debug_print("dst: ", dst, false);

		drm_rect_debug_print("clip: ", &clip, false);

		return -EINVAL;

	}



	return 0;

}



const struct drm_plane_helper_funcs intel_plane_helper_funcs = {

	.prepare_fb = intel_prepare_plane_fb,

	.cleanup_fb = intel_cleanup_plane_fb,

drivers/gpu/drm/i915/display/intel_atomic_plane.h

+8 −1
Original line number Diff line number Diff line
@@ -24,6 +24,9 @@ unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state, 
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,

				   const struct intel_plane_state *plane_state);

void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,

				       const struct intel_plane_state *from_plane_state,

				       struct intel_crtc *crtc);

void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,

			       const struct intel_plane_state *from_plane_state);

void intel_update_plane(struct intel_plane *plane,

			const struct intel_crtc_state *crtc_state,
@@ -52,6 +55,10 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat 
int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,

			       struct intel_plane *plane,

			       bool *need_cdclk_calc);

int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,

				      struct intel_crtc_state *crtc_state,

				      int min_scale, int max_scale,

				      bool can_position);

void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,

			       struct intel_plane_state *plane_state);

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