Commit 46e8a79e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-3.8-single-zimage' of... 

Merge tag 'tegra-for-3.8-single-zimage' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform

From Stephen Warren:
ARM: tegra: single-zImage preparation work

Various cleanups and enhancements are made to core Tegra code towards the
aim of including Tegra in a multi-platform ARM kernel:

RTC, timer, and TWD are configured via device tree.

SPARSE_IRQ is enabled.

Tegra's debug_ll options are simplified, and the macros brought into
line with other multi-platform implementations, and moved to the new
common location.

Two headers still need to be eliminated in order to include Tegra in a
multi-platform kernel/ <mach/{clk,powergate}.h>. A new common API needs
to be invented to replace parts of clk.h. powergate.h might be replaced
by regulators; this needs more investigation.

This pull request is based on tegra-for-3.8-dt, followed by a merge of
arm-soc's devel/debug_ll_init branch.

* tag 'tegra-for-3.8-single-zimage' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (58 commits)
  ARM: tegra: move debug-macro.S to include/debug
  ARM: tegra: don't include iomap.h from debug-macro.S
  ARM: tegra: decouple uncompress.h and debug-macro.S
  ARM: tegra: simplify DEBUG_LL UART selection options
  ARM: tegra: select SPARSE_IRQ
  ARM: tegra: enhance timer.c to get IO address from device tree
  ARM: tegra: enhance timer.c to get IRQ info from device tree
  ARM: timer: fix checkpatch warnings
  ARM: tegra: add TWD to device tree
  ARM: tegra: define DT bindings for and instantiate RTC
  ARM: tegra: define DT bindings for and instantiate timer
  ARM: tegra: whistler: enable HDMI port
  ARM: tegra: tec: Enable HDMI output
  ARM: tegra: plutux: Enable HDMI output
  ARM: tegra: tamonten: Add host1x support
  ARM: tegra: trimslice: enable HDMI port
  ARM: tegra: harmony: enable HDMI port
  ARM: tegra: Add Tegra30 host1x support
  ARM: tegra: Add Tegra20 host1x support
  ARM: tegra: trimslice: enable SPI flash
  ...
parents 794c1539 46067803

Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt

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+19 −0
Original line number Diff line number Diff line 
NVIDIA Tegra20 real-time clock



The Tegra RTC maintains seconds and milliseconds counters, and five alarm

registers. The alarms and other interrupts may wake the system from low-power

state.



Required properties:



- compatible : should be "nvidia,tegra20-rtc".

- reg : Specifies base physical address and size of the registers.

- interrupts : A single interrupt specifier.



Example:



timer {

	compatible = "nvidia,tegra20-rtc";

	reg = <0x7000e000 0x100>;

	interrupts = <0 2 0x04>;

};

Documentation/devicetree/bindings/timer/nvidia,tegra20-timer.txt

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+21 −0
Original line number Diff line number Diff line 
NVIDIA Tegra20 timer



The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free

running counter. The first two channels may also trigger a watchdog reset.



Required properties:



- compatible : should be "nvidia,tegra20-timer".

- reg : Specifies base physical address and size of the registers.

- interrupts : A list of 4 interrupts; one per timer channel.



Example:



timer {

	compatible = "nvidia,tegra20-timer";

	reg = <0x60005000 0x60>;

	interrupts = <0 0 0x04

			0 1 0x04

			0 41 0x04

			0 42 0x04>;

};

Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt

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+23 −0
Original line number Diff line number Diff line 
NVIDIA Tegra30 timer



The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free

running counter, and 5 watchdog modules. The first two channels may also

trigger a legacy watchdog reset.



Required properties:



- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".

- reg : Specifies base physical address and size of the registers.

- interrupts : A list of 6 interrupts; one per each of timer channels 1

    through 5, and one for the shared interrupt for the remaining channels.



timer {

	compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";

	reg = <0x60005000 0x400>;

	interrupts = <0 0 0x04

		      0 1 0x04

		      0 41 0x04

		      0 42 0x04

		      0 121 0x04

		      0 122 0x04>;

};

Documentation/devicetree/bindings/vendor-prefixes.txt

+1 −0
Original line number Diff line number Diff line
@@ -51,4 +51,5 @@ ti Texas Instruments 
via	VIA Technologies, Inc.

wlf	Wolfson Microelectronics

wm	Wondermedia Technologies, Inc.

winbond Winbond Electronics corp.

xlnx	Xilinx

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -644,6 +644,7 @@ config ARCH_TEGRA 
	select HAVE_CLK

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select SPARSE_IRQ

	select USE_OF

	help

	  This enables support for NVIDIA Tegra based systems (Tegra APX,

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