Commit 46d34000 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-dt3-for-v3.15' of... 

Merge tag 'renesas-dt3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Third Round of Renesas ARM Based SoC DT Updates for v3.15" from Simon
Horman:

* r7s72100 SoC (RZ/A1H)
  - Add nodes for i2c controllers to DT

* r7s72100 (RZ/A1H) based Genmai board
  - genmai: adapt dts to use native i2c driver

* r8a7791 SoC (R-Car M2)
  - Remove superfluous interrupt-parents

* r8a7791 (R-Car M2) based Koelsch board
  - Add i2c2 bus to DT
  - Add DU device to DT

* r8a7790 SoC (R-Car H2)
  - Add i2c aliases
  - Remove superfluous interrupt-parents
  - Add QSPI node

* r8a7790 SoC (R-Car M2) based Lager
  - Add DU, SDHI0/1 and QSPI to DT

* r8a7778 SoC (R-Car M1)
  - Remove duplicate i2c nodes

* tag 'renesas-dt3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: shmobile: genmai: adapt dts to use native i2c driver
  ARM: shmobile: r7s72100: add nodes for i2c controllers to dtsi
  ARM: shmobile: r8a7791: add i2c2 bus to koelsch dt
  ARM: shmobile: r8a7791: add i2c master nodes to dtsi
  ARM: shmobile: r8a7790: add i2c aliases to dtsi
  ARM: shmobile: r8a7790: remove superfluous interrupt-parents
  ARM: shmobile: r8a7791: remove superfluous interrupt-parents
  ARM: shmobile: koelsch-reference: Add DU device to DTS
  ARM: shmobile: lager: Add DU device to DTS
  ARM: shmobile: r8a7778 dtsi: Remove duplicate i2c nodes
  ARM: shmobile: lager: add SDHI0/2 support on DTS
  ARM: shmobile: lager dts: Add QSPI nodes
  ARM: shmobile: r8a7790 dtsi: Add QSPI node

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 813004a3 367aaaea

arch/arm/boot/dts/r7s72100-genmai-reference.dts

+11 −0
Original line number Diff line number Diff line
@@ -29,3 +29,14 @@ 
		#size-cells = <1>;

	};

};



&i2c2 {

	status = "okay";

	clock-frequency = <400000>;



	eeprom@50 {

		compatible = "renesas,24c128";

		reg = <0x50>;

		pagesize = <64>;

	};

};

arch/arm/boot/dts/r7s72100.dtsi

+72 −0
Original line number Diff line number Diff line
@@ -17,6 +17,10 @@ 
	#size-cells = <1>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

		spi0 = &spi0;

		spi1 = &spi1;

		spi2 = &spi2;
@@ -44,6 +48,74 @@ 
			<0xe8202000 0x1000>;

	};



	i2c0: i2c@fcfee000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";

		reg = <0xfcfee000 0x44>;

		interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,

			     <0 158 IRQ_TYPE_EDGE_RISING>,

			     <0 159 IRQ_TYPE_EDGE_RISING>,

			     <0 160 IRQ_TYPE_LEVEL_HIGH>,

			     <0 161 IRQ_TYPE_LEVEL_HIGH>,

			     <0 162 IRQ_TYPE_LEVEL_HIGH>,

			     <0 163 IRQ_TYPE_LEVEL_HIGH>,

			     <0 164 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <100000>;

		status = "disabled";

	};



	i2c1: i2c@fcfee400 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";

		reg = <0xfcfee400 0x44>;

		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,

			     <0 166 IRQ_TYPE_EDGE_RISING>,

			     <0 167 IRQ_TYPE_EDGE_RISING>,

			     <0 168 IRQ_TYPE_LEVEL_HIGH>,

			     <0 169 IRQ_TYPE_LEVEL_HIGH>,

			     <0 170 IRQ_TYPE_LEVEL_HIGH>,

			     <0 171 IRQ_TYPE_LEVEL_HIGH>,

			     <0 172 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <100000>;

		status = "disabled";

	};



	i2c2: i2c@fcfee800 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";

		reg = <0xfcfee800 0x44>;

		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,

			     <0 174 IRQ_TYPE_EDGE_RISING>,

			     <0 175 IRQ_TYPE_EDGE_RISING>,

			     <0 176 IRQ_TYPE_LEVEL_HIGH>,

			     <0 177 IRQ_TYPE_LEVEL_HIGH>,

			     <0 178 IRQ_TYPE_LEVEL_HIGH>,

			     <0 179 IRQ_TYPE_LEVEL_HIGH>,

			     <0 180 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <100000>;

		status = "disabled";

	};



	i2c3: i2c@fcfeec00 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";

		reg = <0xfcfeec00 0x44>;

		interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,

			     <0 182 IRQ_TYPE_EDGE_RISING>,

			     <0 183 IRQ_TYPE_EDGE_RISING>,

			     <0 184 IRQ_TYPE_LEVEL_HIGH>,

			     <0 185 IRQ_TYPE_LEVEL_HIGH>,

			     <0 186 IRQ_TYPE_LEVEL_HIGH>,

			     <0 187 IRQ_TYPE_LEVEL_HIGH>,

			     <0 188 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <100000>;

		status = "disabled";

	};



	spi0: spi@e800c800 {

		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";

		reg = <0xe800c800 0x24>;

arch/arm/boot/dts/r8a7778.dtsi

+0 −40
Original line number Diff line number Diff line
@@ -203,46 +203,6 @@ 
		status = "disabled";

	};



	i2c0: i2c@ffc70000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7778";

		reg = <0xffc70000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	i2c1: i2c@ffc71000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7778";

		reg = <0xffc71000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	i2c2: i2c@ffc72000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7778";

		reg = <0xffc72000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	i2c3: i2c@ffc73000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7778";

		reg = <0xffc73000 0x1000>;

		interrupt-parent = <&gic>;

		interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;

		status = "disabled";

	};



	hspi0: spi@fffc7000 {

		compatible = "renesas,hspi";

		reg = <0xfffc7000 0x18>;

arch/arm/boot/dts/r8a7790-lager.dts

+120 −1
Original line number Diff line number Diff line
@@ -56,6 +56,54 @@ 
		regulator-boot-on;

		regulator-always-on;

	};



	vcc_sdhi0: regulator@1 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI0 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	vccq_sdhi0: regulator@2 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI0 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	};



	vcc_sdhi2: regulator@3 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI2 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	vccq_sdhi2: regulator@4 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI2 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	};

};



&extal_clk {
@@ -63,9 +111,14 @@ 
};



&pfc {

	pinctrl-0 = <&scif0_pins &scif1_pins>;

	pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;

	pinctrl-names = "default";



	du_pins: du {

		renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";

		renesas,function = "du";

	};



	scif0_pins: serial0 {

		renesas,groups = "scif0_data";

		renesas,function = "scif0";
@@ -76,10 +129,25 @@ 
		renesas,function = "scif1";

	};



	sdhi0_pins: sd0 {

		renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";

		renesas,function = "sdhi0";

	};



	sdhi2_pins: sd2 {

		renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";

		renesas,function = "sdhi2";

	};



	mmc1_pins: mmc1 {

		renesas,groups = "mmc1_data8", "mmc1_ctrl";

		renesas,function = "mmc1";

	};



	qspi_pins: spi {

		renesas,groups = "qspi_ctrl", "qspi_data4";

		renesas,function = "qspi";

	};

};



&mmcif1 {
@@ -95,3 +163,54 @@ 
&sata1 {

	status = "okay";

};



&spi {

	pinctrl-0 = <&qspi_pins>;

	pinctrl-names = "default";



	status = "okay";



	flash: flash@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "spansion,s25fl512s";

		reg = <0>;

		spi-max-frequency = <30000000>;

		m25p,fast-read;



		partition@0 {

			label = "loader";

			reg = <0x00000000 0x00040000>;

			read-only;

		};

		partition@40000 {

			label = "user";

			reg = <0x00040000 0x00400000>;

			read-only;

		};

		partition@440000 {

			label = "flash";

			reg = <0x00440000 0x03bc0000>;

		};

	};

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&vcc_sdhi0>;

	vqmmc-supply = <&vccq_sdhi0>;

	cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;

	status = "okay";

};



&sdhi2 {

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&vcc_sdhi2>;

	vqmmc-supply = <&vccq_sdhi2>;

	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;

	status = "okay";

};

arch/arm/boot/dts/r8a7790.dtsi

+18 −30
Original line number Diff line number Diff line
@@ -18,6 +18,13 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -94,7 +101,6 @@ 
	gpio0: gpio@e6050000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6050000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -106,7 +112,6 @@ 
	gpio1: gpio@e6051000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6051000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -118,7 +123,6 @@ 
	gpio2: gpio@e6052000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6052000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -130,7 +134,6 @@ 
	gpio3: gpio@e6053000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6053000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -142,7 +145,6 @@ 
	gpio4: gpio@e6054000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6054000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -154,7 +156,6 @@ 
	gpio5: gpio@e6055000 {

		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";

		reg = <0 0xe6055000 0 0x50>;

		interrupt-parent = <&gic>;

		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		gpio-controller;
@@ -166,7 +167,6 @@ 
	thermal@e61f0000 {

		compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";

		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;

		interrupt-parent = <&gic>;

		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;

	};
@@ -184,7 +184,6 @@ 
		#interrupt-cells = <2>;

		interrupt-controller;

		reg = <0 0xe61c0000 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,

			     <0 1 IRQ_TYPE_LEVEL_HIGH>,

			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
@@ -196,7 +195,6 @@ 
		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7790";

		reg = <0 0xe6508000 0 0x40>;

		interrupt-parent = <&gic>;

		interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp9_clks R8A7790_CLK_I2C0>;

		status = "disabled";
@@ -207,7 +205,6 @@ 
		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7790";

		reg = <0 0xe6518000 0 0x40>;

		interrupt-parent = <&gic>;

		interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp9_clks R8A7790_CLK_I2C1>;

		status = "disabled";
@@ -218,7 +215,6 @@ 
		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7790";

		reg = <0 0xe6530000 0 0x40>;

		interrupt-parent = <&gic>;

		interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp9_clks R8A7790_CLK_I2C2>;

		status = "disabled";
@@ -229,7 +225,6 @@ 
		#size-cells = <0>;

		compatible = "renesas,i2c-r8a7790";

		reg = <0 0xe6540000 0 0x40>;

		interrupt-parent = <&gic>;

		interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp9_clks R8A7790_CLK_I2C3>;

		status = "disabled";
@@ -238,7 +233,6 @@ 
	mmcif0: mmcif@ee200000 {

		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";

		reg = <0 0xee200000 0 0x80>;

		interrupt-parent = <&gic>;

		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;

		reg-io-width = <4>;
@@ -248,7 +242,6 @@ 
	mmcif1: mmc@ee220000 {

		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";

		reg = <0 0xee220000 0 0x80>;

		interrupt-parent = <&gic>;

		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;

		reg-io-width = <4>;
@@ -263,7 +256,6 @@ 
	sdhi0: sd@ee100000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee100000 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;

		cap-sd-highspeed;
@@ -273,7 +265,6 @@ 
	sdhi1: sd@ee120000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee120000 0 0x200>;

		interrupt-parent = <&gic>;

		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;

		cap-sd-highspeed;
@@ -283,7 +274,6 @@ 
	sdhi2: sd@ee140000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee140000 0 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;

		cap-sd-highspeed;
@@ -293,7 +283,6 @@ 
	sdhi3: sd@ee160000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee160000 0 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;

		cap-sd-highspeed;
@@ -303,7 +292,6 @@ 
	scifa0: serial@e6c40000 {

		compatible = "renesas,scifa-r8a7790", "renesas,scifa";

		reg = <0 0xe6c40000 0 64>;

		interrupt-parent = <&gic>;

		interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;

		clock-names = "sci_ick";
@@ -312,7 +300,6 @@ 


	scifa1: serial@e6c50000 {

		compatible = "renesas,scifa-r8a7790", "renesas,scifa";

		interrupt-parent = <&gic>;

		reg = <0 0xe6c50000 0 64>;

		interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
@@ -322,7 +309,6 @@ 


	scifa2: serial@e6c60000 {

		compatible = "renesas,scifa-r8a7790", "renesas,scifa";

		interrupt-parent = <&gic>;

		reg = <0 0xe6c60000 0 64>;

		interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
@@ -332,7 +318,6 @@ 


	scifb0: serial@e6c20000 {

		compatible = "renesas,scifb-r8a7790", "renesas,scifb";

		interrupt-parent = <&gic>;

		reg = <0 0xe6c20000 0 64>;

		interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
@@ -342,7 +327,6 @@ 


	scifb1: serial@e6c30000 {

		compatible = "renesas,scifb-r8a7790", "renesas,scifb";

		interrupt-parent = <&gic>;

		reg = <0 0xe6c30000 0 64>;

		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
@@ -352,7 +336,6 @@ 


	scifb2: serial@e6ce0000 {

		compatible = "renesas,scifb-r8a7790", "renesas,scifb";

		interrupt-parent = <&gic>;

		reg = <0 0xe6ce0000 0 64>;

		interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
@@ -362,7 +345,6 @@ 


	scif0: serial@e6e60000 {

		compatible = "renesas,scif-r8a7790", "renesas,scif";

		interrupt-parent = <&gic>;

		reg = <0 0xe6e60000 0 64>;

		interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
@@ -372,7 +354,6 @@ 


	scif1: serial@e6e68000 {

		compatible = "renesas,scif-r8a7790", "renesas,scif";

		interrupt-parent = <&gic>;

		reg = <0 0xe6e68000 0 64>;

		interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
@@ -382,7 +363,6 @@ 


	hscif0: serial@e62c0000 {

		compatible = "renesas,hscif-r8a7790", "renesas,hscif";

		interrupt-parent = <&gic>;

		reg = <0 0xe62c0000 0 96>;

		interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
@@ -392,7 +372,6 @@ 


	hscif1: serial@e62c8000 {

		compatible = "renesas,hscif-r8a7790", "renesas,hscif";

		interrupt-parent = <&gic>;

		reg = <0 0xe62c8000 0 96>;

		interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;
@@ -403,7 +382,6 @@ 
	sata0: sata@ee300000 {

		compatible = "renesas,sata-r8a7790";

		reg = <0 0xee300000 0 0x2000>;

		interrupt-parent = <&gic>;

		interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp8_clks R8A7790_CLK_SATA0>;

		status = "disabled";
@@ -412,7 +390,6 @@ 
	sata1: sata@ee500000 {

		compatible = "renesas,sata-r8a7790";

		reg = <0 0xee500000 0 0x2000>;

		interrupt-parent = <&gic>;

		interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp8_clks R8A7790_CLK_SATA1>;

		status = "disabled";
@@ -752,4 +729,15 @@ 
				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";

		};

	};



	spi: spi@e6b10000 {

		compatible = "renesas,qspi-r8a7790", "renesas,qspi";

		reg = <0 0xe6b10000 0 0x2c>;

		interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;

		num-cs = <1>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};

};

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