PCI: Fix IRQ swizzling for ARI-enabled devices (46b952a3) · Commits · 戴 / test

For many purposes, including interrupt-swizzling, devices with ARI enabled behave as if they have one device (number 0) and 256 functions. This probably hasn't bitten us in practice because all ARI devices I've seen are also IOV devices, and IOV devices are required to use MSI. This isn't guaranteed, and there are legitimate reasons to use ARI without IOV, and hence potentially use pin-based interrupts. Signed-off-by:

Matthew Wilcox <willy@linux.intel.com> Signed-off-by:

Jesse Barnes <jbarnes@virtuousgeek.org>

drivers/pci/pci.c

+11 −2

Original line number	Diff line number	Diff line
		@@ -1517,11 +1517,20 @@ void pci_enable_ari(struct pci_dev *dev)
		*
		* Perform INTx swizzling for a device behind one level of bridge. This is
		* required by section 9.1 of the PCI-to-PCI bridge specification for devices
		* behind bridges on add-in cards.
		* behind bridges on add-in cards. For devices with ARI enabled, the slot
		* number is always 0 (see the Implementation Note in section 2.2.8.1 of
		* the PCI Express Base Specification, Revision 2.1)
		*/
		u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin)
		{
		return (((pin - 1) + PCI_SLOT(dev->devfn)) % 4) + 1;
		int slot;

		if (pci_ari_enabled(dev->bus))
		slot = 0;
		else
		slot = PCI_SLOT(dev->devfn);

		return (((pin - 1) + slot) % 4) + 1;
		}

		int

Admin message