Commit 469030d4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC platform updates from Olof Johansson:
 "Most of these are smaller fixes that have accrued, and some continued
  cleanup of OMAP platforms towards shared frameworks.

  One new SoC from Atmel/Microchip: sam9x60"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits)
  ARM: OMAP2+: Fix undefined reference to omap_secure_init
  ARM: s3c64xx: Drop unneeded select of TIMER_OF
  ARM: exynos: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0
  ARM: s3c24xx: Switch to atomic pwm API in rx1950
  ARM: OMAP2+: sleep43xx: Call secure suspend/resume handlers
  ARM: OMAP2+: Use ARM SMC Calling Convention when OP-TEE is available
  ARM: OMAP2+: Introduce check for OP-TEE in omap_secure_init()
  ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization
  ARM: at91: Documentation: add sam9x60 product and datasheet
  ARM: at91: pm: use of_device_id array to find the proper shdwc node
  ARM: at91: pm: use SAM9X60 PMC's compatible
  ARM: imx: only select ARM_ERRATA_814220 for ARMv7-A
  ARM: zynq: use physical cpuid in zynq_slcr_cpu_stop/start
  ARM: tegra: Use clk_m CPU on Tegra124 LP1 resume
  ARM: tegra: Modify reshift divider during LP1
  ARM: tegra: Enable PLLP bypass during Tegra124 LP1
  ARM: samsung: Rename Samsung and Exynos to lowercase
  ARM: exynos: Correct the help text for platform Kconfig option
  ARM: bcm: Select ARM_AMBA for ARCH_BRCMSTB
  ARM: brcmstb: Add debug UART entry for 7216
  ...
parents b85080c1 d8430df1

Documentation/arm/microchip.rst

+6 −0
Original line number Diff line number Diff line
@@ -92,6 +92,12 @@ the Microchip website: http://www.microchip.com. 


          http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001517A.pdf



      - sam9x60



          * Datasheet



          http://ww1.microchip.com/downloads/en/DeviceDoc/SAM9X60-Data-Sheet-DS60001579A.pdf



    * ARM Cortex-A5 based SoCs

      - sama5d3 family

arch/arm/Kconfig.debug

+3 −3
Original line number Diff line number Diff line
@@ -147,14 +147,14 @@ choice 
		    0x80024000      | 0xf0024000     | UART9



	config DEBUG_AT91_RM9200_DBGU

		bool "Kernel low-level debugging on AT91RM9200, AT91SAM9 DBGU"

		bool "Kernel low-level debugging on AT91RM9200, AT91SAM9, SAM9X60 DBGU"

		select DEBUG_AT91_UART

		depends on SOC_AT91RM9200 || SOC_AT91SAM9

		depends on SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60

		help

		  Say Y here if you want kernel low-level debugging support

		  on the DBGU port of:

		    at91rm9200, at91sam9260, at91sam9g20, at91sam9261,

		    at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5

		    at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5, sam9x60



	config DEBUG_AT91_SAM9263_DBGU

		bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU"

arch/arm/include/debug/brcmstb.S

+13 −11
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#define UARTA_7268		UARTA_7255

#define UARTA_7271		UARTA_7268

#define UARTA_7278		REG_PHYS_ADDR_V7(0x40c000)

#define UARTA_7216		UARTA_7278

#define UARTA_7364		REG_PHYS_ADDR(0x40b000)

#define UARTA_7366		UARTA_7364

#define UARTA_74371		REG_PHYS_ADDR(0x406b00)
@@ -82,17 +83,18 @@ ARM_BE8( rev \rv, \rv ) 


		/* Chip specific detection starts here */

20:		checkuart(\rp, \rv, 0x33900000, 3390)

21:		checkuart(\rp, \rv, 0x72500000, 7250)

22:		checkuart(\rp, \rv, 0x72550000, 7255)

23:		checkuart(\rp, \rv, 0x72600000, 7260)

24:		checkuart(\rp, \rv, 0x72680000, 7268)

25:		checkuart(\rp, \rv, 0x72710000, 7271)

26:		checkuart(\rp, \rv, 0x72780000, 7278)

27:		checkuart(\rp, \rv, 0x73640000, 7364)

28:		checkuart(\rp, \rv, 0x73660000, 7366)

29:		checkuart(\rp, \rv, 0x07437100, 74371)

30:		checkuart(\rp, \rv, 0x74390000, 7439)

31:		checkuart(\rp, \rv, 0x74450000, 7445)

21:		checkuart(\rp, \rv, 0x72160000, 7216)

22:		checkuart(\rp, \rv, 0x72500000, 7250)

23:		checkuart(\rp, \rv, 0x72550000, 7255)

24:		checkuart(\rp, \rv, 0x72600000, 7260)

25:		checkuart(\rp, \rv, 0x72680000, 7268)

26:		checkuart(\rp, \rv, 0x72710000, 7271)

27:		checkuart(\rp, \rv, 0x72780000, 7278)

28:		checkuart(\rp, \rv, 0x73640000, 7364)

29:		checkuart(\rp, \rv, 0x73660000, 7366)

30:		checkuart(\rp, \rv, 0x07437100, 74371)

31:		checkuart(\rp, \rv, 0x74390000, 7439)

32:		checkuart(\rp, \rv, 0x74450000, 7445)



		/* No valid UART found */

90:		mov	\rp, #0

arch/arm/mach-at91/Kconfig

+22 −2
Original line number Diff line number Diff line
@@ -105,11 +105,28 @@ config SOC_AT91SAM9 
	    AT91SAM9X35

	    AT91SAM9XE



config SOC_SAM9X60

	bool "SAM9X60"

	depends on ARCH_MULTI_V5

	select ATMEL_AIC5_IRQ

	select ATMEL_PM if PM

	select ATMEL_SDRAMC

	select CPU_ARM926T

	select HAVE_AT91_USB_CLK

	select HAVE_AT91_GENERATED_CLK

	select HAVE_AT91_SAM9X60_PLL

	select MEMORY

	select PINCTRL_AT91

	select SOC_SAM_V4_V5

	select SRAM if PM

	help

	  Select this if you are using Microchip's SAM9X60 SoC



comment "Clocksource driver selection"



config ATMEL_CLOCKSOURCE_PIT

	bool "Periodic Interval Timer (PIT) support"

	depends on SOC_AT91SAM9 || SOC_SAMA5

	depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5

	default SOC_AT91SAM9 || SOC_SAMA5

	select ATMEL_PIT

	help
@@ -119,7 +136,7 @@ config ATMEL_CLOCKSOURCE_PIT 


config ATMEL_CLOCKSOURCE_TCB

	bool "Timer Counter Blocks (TCB) support"

	default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5

	default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5

	select ATMEL_TCB_CLKSRC

	help

	  Select this to get a high precision clocksource based on a
@@ -154,6 +171,9 @@ config HAVE_AT91_AUDIO_PLL 
config HAVE_AT91_I2S_MUX_CLK

	bool



config HAVE_AT91_SAM9X60_PLL

	bool



config SOC_SAM_V4_V5

	bool

arch/arm/mach-at91/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
# CPU-specific support

obj-$(CONFIG_SOC_AT91RM9200)	+= at91rm9200.o

obj-$(CONFIG_SOC_AT91SAM9)	+= at91sam9.o

obj-$(CONFIG_SOC_SAM9X60)	+= sam9x60.o

obj-$(CONFIG_SOC_SAMA5)		+= sama5.o

obj-$(CONFIG_SOC_SAMV7)		+= samv7.o

CRA Git | Maintained and supported by SUSTech CRA and CCSE