Commit 464d636b authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50/vm: remove explicit vm knowledge from engines 



This reverses the lock ordering between VM and gr/nv84:nvc0.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent c3032adb

drivers/gpu/drm/nouveau/core/engine/copy/nva3.c

+0 −8
Original line number Diff line number Diff line
@@ -116,13 +116,6 @@ nva3_copy_intr(struct nouveau_subdev *subdev) 
	nouveau_engctx_put(engctx);

}



static int

nva3_copy_tlb_flush(struct nouveau_engine *engine)

{

	nv50_vm_flush_engine(&engine->base, 0x0d);

	return 0;

}



static int

nva3_copy_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	       struct nouveau_oclass *oclass, void *data, u32 size,
@@ -142,7 +135,6 @@ nva3_copy_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->intr = nva3_copy_intr;

	nv_engine(priv)->cclass = &nva3_copy_cclass;

	nv_engine(priv)->sclass = nva3_copy_sclass;

	nv_engine(priv)->tlb_flush = nva3_copy_tlb_flush;

	nv_falcon(priv)->code.data = nva3_pcopy_code;

	nv_falcon(priv)->code.size = sizeof(nva3_pcopy_code);

	nv_falcon(priv)->data.data = nva3_pcopy_data;

drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c

+0 −8
Original line number Diff line number Diff line
@@ -140,13 +140,6 @@ nv84_crypt_intr(struct nouveau_subdev *subdev) 
	nouveau_engctx_put(engctx);

}



static int

nv84_crypt_tlb_flush(struct nouveau_engine *engine)

{

	nv50_vm_flush_engine(&engine->base, 0x0a);

	return 0;

}



static int

nv84_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	       struct nouveau_oclass *oclass, void *data, u32 size,
@@ -165,7 +158,6 @@ nv84_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->intr = nv84_crypt_intr;

	nv_engine(priv)->cclass = &nv84_crypt_cclass;

	nv_engine(priv)->sclass = nv84_crypt_sclass;

	nv_engine(priv)->tlb_flush = nv84_crypt_tlb_flush;

	return 0;

}

drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c

+0 −8
Original line number Diff line number Diff line
@@ -118,13 +118,6 @@ nv98_crypt_intr(struct nouveau_subdev *subdev) 
	nouveau_engctx_put(engctx);

}



static int

nv98_crypt_tlb_flush(struct nouveau_engine *engine)

{

	nv50_vm_flush_engine(&engine->base, 0x0a);

	return 0;

}



static int

nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	       struct nouveau_oclass *oclass, void *data, u32 size,
@@ -143,7 +136,6 @@ nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->intr = nv98_crypt_intr;

	nv_engine(priv)->cclass = &nv98_crypt_cclass;

	nv_engine(priv)->sclass = nv98_crypt_sclass;

	nv_engine(priv)->tlb_flush = nv98_crypt_tlb_flush;

	nv_falcon(priv)->code.data = nv98_pcrypt_code;

	nv_falcon(priv)->code.size = sizeof(nv98_pcrypt_code);

	nv_falcon(priv)->data.data = nv98_pcrypt_data;

drivers/gpu/drm/nouveau/core/engine/graph/nv50.c

+6 −12
Original line number Diff line number Diff line
@@ -186,13 +186,6 @@ nv50_graph_cclass = { 
 * PGRAPH engine/subdev functions

 ******************************************************************************/



static int

nv50_graph_tlb_flush(struct nouveau_engine *engine)

{

	nv50_vm_flush_engine(&engine->base, 0x00);

	return 0;

}



static const struct nouveau_bitfield nv50_pgraph_status[] = {

	{ 0x00000001, "BUSY" }, /* set when any bit is set */

	{ 0x00000002, "DISPATCH" },
@@ -302,8 +295,10 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine) 
				nv_rd32(priv, 0x400388));

	}



	nv50_vm_flush_engine(&engine->base, 0x00);



	nv_wr32(priv, 0x100c80, 0x00000001);

	if (!nv_wait(priv, 0x100c80, 0x00000001, 0x00000000))

		nv_error(priv, "vm flush timeout\n");

	nv_mask(priv, 0x400500, 0x00000001, 0x00000001);

	spin_unlock_irqrestore(&priv->lock, flags);

	return timeout ? -EBUSY : 0;
@@ -857,10 +852,9 @@ nv50_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 


	};



	if (nv_device(priv)->chipset == 0x50 ||

	    nv_device(priv)->chipset == 0xac)

		nv_engine(priv)->tlb_flush = nv50_graph_tlb_flush;

	else

	/* unfortunate hw bug workaround... */

	if (nv_device(priv)->chipset != 0x50 &&

	    nv_device(priv)->chipset != 0xac)

		nv_engine(priv)->tlb_flush = nv84_graph_tlb_flush;



	spin_lock_init(&priv->lock);

drivers/gpu/drm/nouveau/core/engine/mpeg/nv50.c

+0 −8
Original line number Diff line number Diff line
@@ -125,13 +125,6 @@ nv50_mpeg_cclass = { 
 * PMPEG engine/subdev functions

 ******************************************************************************/



int

nv50_mpeg_tlb_flush(struct nouveau_engine *engine)

{

	nv50_vm_flush_engine(&engine->base, 0x08);

	return 0;

}



void

nv50_mpeg_intr(struct nouveau_subdev *subdev)

{
@@ -191,7 +184,6 @@ nv50_mpeg_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->intr = nv50_vpe_intr;

	nv_engine(priv)->cclass = &nv50_mpeg_cclass;

	nv_engine(priv)->sclass = nv50_mpeg_sclass;

	nv_engine(priv)->tlb_flush = nv50_mpeg_tlb_flush;

	return 0;

}

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