Commit 46203a50 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gmc10: properly set BANK_SELECT and FRAGMENT_SIZE 



These were not aligned for optimal performance for GPUVM.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarTianci Yin <tianci.yin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 361d66ed

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

+9 −0
Original line number Diff line number Diff line
@@ -155,6 +155,15 @@ static void gfxhub_v2_0_init_cache_regs(struct amdgpu_device *adev) 
	WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);



	tmp = mmGCVM_L2_CNTL3_DEFAULT;

	if (adev->gmc.translate_further) {

		tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 12);

		tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3,

				    L2_CACHE_BIGK_FRAGMENT_SIZE, 9);

	} else {

		tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, BANK_SELECT, 9);

		tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3,

				    L2_CACHE_BIGK_FRAGMENT_SIZE, 6);

	}

	WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);



	tmp = mmGCVM_L2_CNTL4_DEFAULT;

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

+9 −0
Original line number Diff line number Diff line
@@ -142,6 +142,15 @@ static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev) 
	WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp);



	tmp = mmMMVM_L2_CNTL3_DEFAULT;

	if (adev->gmc.translate_further) {

		tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12);

		tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3,

				    L2_CACHE_BIGK_FRAGMENT_SIZE, 9);

	} else {

		tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9);

		tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3,

				    L2_CACHE_BIGK_FRAGMENT_SIZE, 6);

	}

	WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, tmp);



	tmp = mmMMVM_L2_CNTL4_DEFAULT;

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