Commit 461324f0 authored by Grzegorz Jaszczyk's avatar Grzegorz Jaszczyk Committed by Kishon Vijay Abraham I
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phy: mvebu-cp110-comphy: Add RXAUI support 



Add support for RXAUI mode by adding an entry in the COMPHY modes list.

There is no user for this mode yet so we can enforce an up-to-date
firmware and return an error otherwise without breaking anywone.

Signed-off-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
[miquel.raynal@bootlin.com: adapt the content to the mainline driver]
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent ea678b4b

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

+10 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ 


#define COMPHY_FW_MODE_SGMII		0x2 /* SGMII 1G */

#define COMPHY_FW_MODE_HS_SGMII		0x3 /* SGMII 2.5G */

#define COMPHY_FW_MODE_RXAUI		0x7

#define COMPHY_FW_MODE_XFI		0x8 /* SFI: 0x9 (is treated like XFI) */



struct mvebu_comphy_conf {
@@ -188,18 +189,22 @@ static const struct mvebu_comphy_conf mvebu_comphy_cp110_modes[] = { 
	/* lane 2 */

	MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII),

	MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII),

	MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_RXAUI, -1, COMPHY_FW_MODE_RXAUI),

	MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1, COMPHY_FW_MODE_XFI),

	/* lane 3 */

	MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2, COMPHY_FW_MODE_SGMII),

	MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2, COMPHY_FW_MODE_HS_SGMII),

	MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_RXAUI, -1, COMPHY_FW_MODE_RXAUI),

	/* lane 4 */

	MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2, COMPHY_FW_MODE_SGMII),

	MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2, COMPHY_FW_MODE_HS_SGMII),

	MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2, COMPHY_FW_MODE_XFI),

	MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_RXAUI, -1, COMPHY_FW_MODE_RXAUI),

	MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII),

	MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_2500BASEX, -1, COMPHY_FW_MODE_HS_SGMII),

	MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_10GKR, -1, COMPHY_FW_MODE_XFI),

	/* lane 5 */

	MVEBU_COMPHY_CONF(5, 1, PHY_INTERFACE_MODE_RXAUI, -1, COMPHY_FW_MODE_RXAUI),

	MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII),

	MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII),

};
@@ -611,6 +616,11 @@ static int mvebu_comphy_power_on(struct phy *phy) 
	switch (lane->mode) {

	case PHY_MODE_ETHERNET:

		switch (lane->submode) {

		case PHY_INTERFACE_MODE_RXAUI:

			dev_dbg(priv->dev, "set lane %d to RXAUI mode\n",

				lane->id);

			fw_speed = 0;

			break;

		case PHY_INTERFACE_MODE_SGMII:

			dev_dbg(priv->dev, "set lane %d to 1000BASE-X mode\n",

				lane->id);

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